Jasmine Kaur Gulati

According to our database, Jasmine Kaur Gulati authored at least 2 papers between 2016 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2017

An Efficient Timing and Clock Tree Aware Placement Flow with Multibit Flip-Flops for Power Reduction.

Jasmine Kaur Gulati, Bhanu Prakash, Sumit Jagdish Darak

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

2016

Quantification of figures of merit of 7T and 8T SRAM cells in subthreshold region and their comparison with the conventional 6T SRAM cell.

Pulkit Sharma, R. Anusha, K. Bharath, Jasmine Kaur Gulati, Preet K. Walia, Sumit Jagdish Darak

Proceedings of the 20th International Symposium on VLSI Design and Test, 2016