Jarno K. Tanskanen

According to our database, Jarno K. Tanskanen authored at least 10 papers between 1999 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2009

Parallel Memory Architecture for Application-Specific Instruction-Set Processors.

Teemu Pitkänen, Jarno K. Tanskanen, Risto Mäkinen, Jarmo Takala

J. Signal Process. Syst., 2009

2007

Parallel Memory Architecture for TTA Processor.

Jarno K. Tanskanen, Teemu Pitkänen, Risto Mäkinen, Jarmo Takala

Proceedings of the Embedded Computer Systems: Architectures, 2007

2005

On Design of Parallel Memory Access Schemes for Video Coding.

Jarno K. Tanskanen, Reiner Creutzburg, Jarkko Niittylahti

J. VLSI Signal Process., 2005

2004

Parallel memory architectures for video coding.

Jarno K. Tanskanen

PhD thesis, 2004

Scalable Parallel Memory Architectures for Video Coding.

Jarno K. Tanskanen, Jarkko Niittylahti

J. VLSI Signal Process., 2004

Byte and modulo addressable parallel memory architecture for video coding.

Jarno K. Tanskanen, Tero Sihvo, Jarkko Niittylahti

IEEE Trans. Circuits Syst. Video Technol., 2004

2002

Configurable parallel memory architecture for multimedia computers.

Kimmo Kuusilinna, Jarno K. Tanskanen, Timo Hämäläinen, Jarkko Niittylahti

J. Syst. Archit., 2002

2000

Parallel, memory access schemes for H.263 encoder.

Jarno K. Tanskanen, Tero Sihvo, Jarkko Niittylahti, Jarmo Takala, Reiner Creutzburg

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Verifying external data memory interface for H.263 video DSP with memory simulator.

Juha Alakarhu, Jarkko Niittylahti, Tero Sihvo, Jarno K. Tanskanen

Proceedings of the 10th European Signal Processing Conference, 2000

1999

Parallel Memories in Video Encoding.

Jarno K. Tanskanen, Jarkko Niittylahti

Proceedings of the Data Compression Conference, 1999