Jared Stark

According to our database, Jared Stark authored at least 23 papers between 1996 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

PDIP: Priority Directed Instruction Prefetching.

Bhargav Reddy Godala, Sankara Prasad Ramesh, Gilles A. Pokam, Jared Stark, André Seznec, Dean M. Tullsen, David I. August

Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023

EMISSARY: Enhanced Miss Awareness Replacement Policy for L2 Instruction Caching.

Nayana Prasad Nagendra, Bhargav Reddy Godala, Ishita Chaturvedi, Atmn Patel, Svilen Kanev, Tipp Moseley, Jared Stark, Gilles A. Pokam, Simone Campanoni, David I. August

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

2019

Towards the adoption of Local Branch Predictors in Modern Out-of-Order Superscalar Processors.

Niranjan Soundararajan, Saurabh Gupta, Ragavendra Natarajan, Jared Stark, Rahul Pal, Franck Sala, Lihu Rappoport, Adi Yoaz, Sreenivas Subramoney

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

2014

Author retrospective for bloom filtering cache misses for accurate data speculation and prefetching.

Jih-Kwon Peir, Shih-Chang Kevin Lai, Shih-Lien Lu, Jared Stark, Konrad Lai

Proceedings of the ACM International Conference on Supercomputing 25th Anniversary Volume, 2014

2006

Wish Branches: Enabling Adaptive and Aggressive Predicated Execution.

Hyesoon Kim, Onur Mutlu, Yale N. Patt, Jared Stark

IEEE Micro, 2006

2005

Better Branch Prediction Through Prophet/Critic Hybrids.

Ayose Falcón, Jared Stark, Alex Ramírez, Konrad K. Lai, Mateo Valero

IEEE Micro, 2005

Guest Editors Introduction.

Chris Wilkerson, Jared Stark

J. Instr. Level Parallelism, 2005

On Reusing the Results of Pre-Executed Instructions in a Runahead Execution Processor.

Onur Mutlu, Hyesoon Kim, Jared Stark, Yale N. Patt

IEEE Comput. Archit. Lett., 2005

Wish Branches: Combining Conditional Branching and Predication for Adaptive Predicated Execution.

Hyesoon Kim, Onur Mutlu, Jared Stark, Yale N. Patt

Proceedings of the 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 2005

2004

Prophet/Critic Hybrid Branch Prediction.

Ayose Falcón, Jared Stark, Alex Ramírez, Konrad Lai, Mateo Valero

Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004

2003

Runahead Execution: An Effective Alternative to Large Instruction Windows.

Onur Mutlu, Jared Stark, Chris Wilkerson, Yale N. Patt

IEEE Micro, 2003

Improving Branch Prediction by Dynamic Dataflow-Based Identification of Correlated Branches from a Large Global History.

Renju Thomas, Manoj Franklin, Chris Wilkerson, Jared Stark

Proceedings of the 30th International Symposium on Computer Architecture (ISCA 2003), 2003

Runahead Execution: An Alternative to Very Large Instruction Windows for Out-of-Order Processors.

Onur Mutlu, Jared Stark, Chris Wilkerson, Yale N. Patt

Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), 2003

2002

Bloom filtering cache misses for accurate data speculation and prefetching.

Jih-Kwon Peir, Shih-Chang Lai, Shih-Lien Lu, Jared Stark, Konrad Lai

Proceedings of the 16th international conference on Supercomputing, 2002

2001

Select-free instruction scheduling logic.

Mary D. Brown, Jared Stark, Yale N. Patt

Proceedings of the 34th Annual International Symposium on Microarchitecture, 2001

2000

Out-of-order fetch, decode, and issue.

Jared Stark

PhD thesis, 2000

On pipelining dynamic instruction scheduling logic.

Jared Stark, Mary D. Brown, Yale N. Patt

Proceedings of the 33rd Annual IEEE/ACM International Symposium on Microarchitecture, 2000

1999

Simultaneous Subordinate Microthreading (SSMT).

Robert S. Chappell, Jared Stark, Sangwook P. Kim, Steven K. Reinhardt, Yale N. Patt

Proceedings of the 26th Annual International Symposium on Computer Architecture, 1999

1998

Variable Length Path Branch Prediction.

Jared Stark, Marius Evers, Yale N. Patt

Proceedings of the ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, 1998

1997

Recovery requirements of branch prediction storage structures in the presence of mispredicted-path execution.

Stéphan Jourdan, Jared Stark, Tse-Hao Hsing, Yale N. Patt

Int. J. Parallel Program., 1997

One Billion Transistors, One Uniprocessor, One Chip.

Yale N. Patt, Sanjay J. Patel, Marius Evers, Daniel H. Friendly, Jared Stark

Computer, 1997

Reducing the Performance Impact of Instruction Cache Misses by Writing Instructions into the Reservation Stations Out-of-Order.

Jared Stark, Paul Racunas, Yale N. Patt

Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, 1997

1996

The effects of mispredicted-path execution on branch prediction structures.

Stéphan Jourdan, Tse-Hao Hsing, Jared Stark, Yale N. Patt

Proceedings of the Fifth International Conference on Parallel Architectures and Compilation Techniques, 1996