Jarbas A. N. Silveira

Orcid: 0000-0003-2590-9520

According to our database1, Jarbas A. N. Silveira authored at least 3 papers between 2017 and 2020.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of six.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-bit Memories used on Space Missions.
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

2019
Optimized Fault-Tolerant Buffer Design for Network-on-Chip Applications.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

2017
Latency reduction of fault-tolerant NoCs by employing multiple paths.
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017


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