Japesh Vohra

According to our database, Japesh Vohra authored at least 7 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

122.7 TOPS/W Stdcell-Based DNN Accelerator Based on Transition Density Data Representation, Clock-Less MAC Operation, Pseudo-Sparsity Exploitation in 40 nm.

Animesh Gupta, Japesh Vohra, Viveka Konandur Rajanna, Massimo Alioto

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

CogniVision: End-to-End SoC for Always-on Smart Vision with mW Power in 40nm.

Animesh Gupta, Japesh Vohra, Massimo Alioto

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

6.3 Imager with In-Sensor Event Detection and Morphological Transformations with 2.9pJ/pixel×frame Object Segmentation FOM for Always-On Surveillance in 40nm.

Japesh Vohra, Animesh Gupta, Massimo Alioto

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

CogniVision: A mW Power envelope SoC for Always-on Smart Vision in 40nm.

Animesh Gupta, Japesh Vohra, Massimo Alioto

Proceedings of the 36th IEEE Hot Chips Symposium, 2024

2023

A 0.4V 12b Comparator Offset Injection Assisted SAR ADC achieving 0.425 fJ/conv-step.

Japesh Vohra, Karim Ali Ahmed, Massimo Alioto

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

2019

Ultra Low Energy Reduced Switching DAC for SAR ADC.

Japesh Vohra, Hande Vinayak Gopal

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

2018

Ultra low-energy active charge restoration DAC for SAR Analog-to-Digital Converter.

Japesh Vohra, Vinayak Hande

Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018