Jannis Stoppe
Orcid: 0000-0003-2952-3422Affiliations:
- German Research Center for Artificial Intelligence (DFKI), Bremen, Germany
According to our database1,
Jannis Stoppe
authored at least 28 papers
between 2010 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
2023
Learning Representative Trajectories of Dynamical Systems via Domain-Adaptive Imitation.
CoRR, 2023
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023
2021
A Whole World of Circuitry - Visualizing Integrated Circuits using Geo Information Systems.
Balt. J. Mod. Comput., 2021
Proceedings of the 24th IEEE International Intelligent Transportation Systems Conference, 2021
A Backwards Compatible Approach to Authenticate Automatic Identification System Messages.
Proceedings of the IEEE International Conference on Cyber Security and Resilience, 2021
2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
2018
Resilience Evaluation for Approximating SystemC Designs Using Machine Learning Techniques.
Proceedings of the 2018 International Symposium on Rapid System Prototyping, 2018
Building Fast Multi Agent Systems Using Hardware Design Languages for High-Throughput Systems.
Proceedings of the Dynamics in Logistics, 2018
2017
SystemC Through the Looking Glass: Non-Intrusive Analysis of Electronic System Level Designs in SystemC (SystemC hinter den Spiegeln: Nichtinvasive Analyse von SystemC-Systemdesigns)
PhD thesis, 2017
Einfluss von Zellformen auf das Routing von Digital Microfluidic Biochips.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2017
BioViz: An Interactive Visualization Engine for the Design of Digital Microfluidic Biochips.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Automatic Protocol Compliance Checking of SystemC TLM-2.0 Simulation Behavior Using Timed Automata.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017
Proceedings of the Formal Modeling and Analysis of Timed Systems, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Automatic equivalence checking for SystemC-TLM 2.0 models against their formal specifications.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2016
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016
AIBA: An Automated Intra-cycle Behavioral Analysis for SystemC-based design exploration.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016
Proceedings of the 2016 Forum on Specification and Design Languages, 2016
2015
Sensors, 2015
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
2014
Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014
Proceedings of the Reversible Computation - 6th International Conference, 2014
2013
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
2011
Proceedings of the 2011 ACM Symposium on Document Engineering, 2011
2010
Proceedings of the 2010 ACM Symposium on Document Engineering, 2010