Janne Roos

According to our database1, Janne Roos authored at least 20 papers between 1996 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2014
Benefits of Partitioning in a Projection-based and Realizable Model-order Reduction Flow.
J. Electron. Test., 2014

2013
Sparsification of Dense Capacitive Coupling of Interconnect Models.
IEEE Trans. Very Large Scale Integr. Syst., 2013

Realizable reduction of interconnect models with dense coupling.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

Admittance parameter formulation for realizable model-order reduction.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

2011
PartMOR: Partitioning-Based Realizable Model-Order Reduction Method for RLC Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

2009
Enhanced multivariate steady-state time-domain method.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

Partitioning-based second-order model-order reduction method for RC circuits.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

General measurement-based circuit model for symmetrical four-port RF transformers.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

Frequency/time block preconditioners for harmonic balance jacobians.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

2008
Study and development of an efficient RC-in-RC-out MOR method.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007
Speed-up and performance evaluation of piecewise-linear DC analysis.
Int. J. Circuit Theory Appl., 2007

2005
On simplex-based piecewise-linear approximations of non-linear mappings.
Int. J. Circuit Theory Appl., 2005

2003
An efficient reduced-order interconnect macromodel for time-domain simulation.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
Implementation of piecewise-linear DC analysis in APLAC.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Development of simplex-based piecewise-linear approximations of nonlinear mappings.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Development and comparison of reduced-order interconnect macromodels for time-domain simulation.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Simple reduced-order macromodels with PRIMA.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

2000
Always convergent piecewise-linear DC analysis by an appropriate choice of initial conditions.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
An efficient piecewise‐linear DC analysis method for general non‐linear circuits.
Int. J. Circuit Theory Appl., 1999

1996
General-purpose piecewise-linear DC analysis.
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996


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