Jangwon Park
According to our database1,
Jangwon Park
authored at least 10 papers
between 2013 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
2021
A hybrid optimization approach for employee rostering: Use cases at Swissgrid and lessons learned.
CoRR, 2021
Proceedings of the Neural Information Processing Systems Track on Datasets and Benchmarks 1, 2021
2020
13.2 A 1Tb 4b/Cell 96-Stacked-WL 3D NAND Flash Memory with 30MB/s Program Throughput Using Peripheral Circuit Under Memory Cell Array Technique.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
Proceedings of the 2nd Workshop on Machine Reading for Question Answering, 2019
2017
2014
VL-ECC: Variable Data-Length Error Correction Code for Embedded Memory in DSP Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2014
2013
Priority Based Error Correction Code (ECC) for the Embedded SRAM Memories in H.264 System.
J. Signal Process. Syst., 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013