Jang-Gn Yun

According to our database1, Jang-Gn Yun authored at least 5 papers between 2005 and 2010.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2010
Simulation Study on Dependence of Channel Potential Self-Boosting on Device Scale and Doping Concentration in 2-D and 3-D NAND-Type Flash Memory Devices.
IEICE Trans. Electron., 2010

2008
Characterization of 2-bit Recessed Channel Memory with Lifted-Charge Trapping Node (L-CTN) Scheme.
IEICE Trans. Electron., 2008

Establishing Read Operation Bias Schemes for 3-D Pillar Structure Flash Memory Devices to Overcome Paired Cell Interference (PCI).
IEICE Trans. Electron., 2008

2007
Analyses on Current Characteristics of 3-D MOSFET Determined by Junction Doping Profiles for Nonvolatile Memory Devices.
IEICE Trans. Electron., 2007

2005
Thermally Robust Nickel Silicide Process for Nano-Scale CMOS Technology.
IEICE Trans. Electron., 2005


  Loading...