Jan Pidanic

Orcid: 0000-0003-1948-3818

According to our database1, Jan Pidanic authored at least 20 papers between 2013 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A Low-Power Co-Processor to Predict Ventricular Arrhythmia for Wearable Healthcare Devices.
IEEE Trans. Very Large Scale Integr. Syst., September, 2024

Sliding Mode Without Reaching Phase Design for Automatic Load Frequency Control of Multi-Time Delays Power System.
IEEE Access, 2024

2023
An Optimized Low-Power VLSI Architecture for ECG/VCG Data Compression for IoHT Wearable Device Application.
IEEE Trans. Very Large Scale Integr. Syst., December, 2023

Tensor Based Multivariate Polynomial Modulo Multiplier for Cryptographic Applications.
IEEE Trans. Computers, June, 2023

Design of DNN-Based Low-Power VLSI Architecture to Classify Atrial Fibrillation for Wearable Devices.
IEEE Trans. Very Large Scale Integr. Syst., March, 2023

Road to Repair (R2R): An Afrocentric Sensor-Based Solution to Enhanced Road Maintenance.
IEEE Access, 2023

IndiRA: Design and Implementation of a Pipelined RISC-V Processor.
Proceedings of the 33rd International Conference Radioelektronika, 2023

Employing Quantile and Probability Plots for Comparing and Assessing Goodness of Fit for Stochastic Models of the DCT Coefficients of Lossy Compressed Images.
Proceedings of the 33rd International Conference Radioelektronika, 2023

2022
Scattering Centers to Point Clouds: A Review of mmWave Radars for Non-Radar-Engineers.
IEEE Access, 2022

Wind Turbine Micro-Doppler Prediction Using Unscented Kalman Filter.
IEEE Access, 2022

Design of a Low Power and Area Efficient Bfloat16 based Generalized Systolic Array for DNN Applications.
Proceedings of the 32nd International Conference Radioelektronika, 2022

A Scalable and Adaptive Convolutional Neural Network Accelerator.
Proceedings of the 32nd International Conference Radioelektronika, 2022

An Area and Power Efficient VLSI Architecture to Detect Obstructive Sleep Apnea for Wearable Devices.
Proceedings of the 32nd International Conference Radioelektronika, 2022

Comparison of Floating-point Representations for the Efficient Implementation of Machine Learning Algorithms.
Proceedings of the 32nd International Conference Radioelektronika, 2022

Design and Implementation of a Low Power Area Efficient Bfloat16 based CORDIC Processor.
Proceedings of the 32nd International Conference Radioelektronika, 2022

An Energy Efficient and Resource Optimal VLSI Architecture for ECG Feature Extraction for Wearable Healthcare Applications.
Proceedings of the 32nd International Conference Radioelektronika, 2022

2021
Rough North Correction Estimation Algorithm Based on Terrain Visibility.
IEEE Access, 2021

2020
Design of Efficient AES Architecture for Secure ECG Signal Transmission for Low-power IoT Applications.
Proceedings of the 30th International Conference Radioelektronika, 2020

2019
RiverOpt: A Multiobjective Optimization Framework Based on Modified River Formation Dynamics Heuristic.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

2013
Computing of bistatic cross-ambiguity function on GPU.
Proceedings of the 22nd IEEE International Symposium on Industrial Electronics, 2013


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