Jan Gray

According to our database1, Jan Gray authored at least 9 papers between 2000 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2018
Towards an Area-Efficient Implementation of a High ILP EDGE Soft Processor.
CoRR, 2018

2017
Hoplite: A Deflection-Routed Directional Torus NoC for FPGAs.
ACM Trans. Reconfigurable Technol. Syst., 2017

Enabling partial reconfiguration and low latency routing using segmented FPGA NoCs.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016
A reconfigurable fabric for accelerating large-scale datacenter services.
Commun. ACM, 2016

GRVI Phalanx: A Massively Parallel RISC-V FPGA Accelerator Accelerator.
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

2015
Hoplite: Building austere overlay NoCs for FPGAs.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

2014
Keynote - The past and future of FPGA soft processors.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

2013
Reconfigurable computing in the era of post-silicon scaling [panel discussion].
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

2000
Hands-on computer architecture: teaching processor and integrated systems design with FPGAs.
Proceedings of the 2000 workshop on Computer architecture education, 2000


  Loading...