Jan Gray

According to our database, Jan Gray authored at least 9 papers between 2000 and 2018.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2018

Towards an Area-Efficient Implementation of a High ILP EDGE Soft Processor.

Jan Gray, Aaron Smith

CoRR, 2018

2017

Hoplite: A Deflection-Routed Directional Torus NoC for FPGAs.

Nachiket Kapre, Jan Gray

ACM Trans. Reconfigurable Technol. Syst., 2017

Enabling partial reconfiguration and low latency routing using segmented FPGA NoCs.

Kizheppatt Vipin, Jan Gray, Nachiket Kapre

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016

A reconfigurable fabric for accelerating large-scale datacenter services.

Andrew Putnam, Adrian M. Caulfield, Eric S. Chung, Derek Chiou, Kypros Constantinides, John Demme, Hadi Esmaeilzadeh, Jeremy Fowers, Gopi Prashanth Gopal, Jan Gray, Michael Haselman, Scott Hauck, Stephen Heil, Amir Hormati, Joo-Young Kim, Sitaram Lanka, James R. Larus, Eric Peterson, Simon Pope, Aaron Smith, Jason Thong, Phillip Yi Xiao, Doug Burger

Commun. ACM, 2016

GRVI Phalanx: A Massively Parallel RISC-V FPGA Accelerator Accelerator.

Jan Gray

Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

2015

Hoplite: Building austere overlay NoCs for FPGAs.

Nachiket Kapre, Jan Gray

Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

2014

Keynote - The past and future of FPGA soft processors.

Jan Gray

Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

2013

Reconfigurable computing in the era of post-silicon scaling [panel discussion].

Eric S. Chung, Doug Burger, Mike Butts, Jan Gray, Chuck Thacker, Kees A. Vissers, John Wawrzynek

Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

2000

Hands-on computer architecture: teaching processor and integrated systems design with FPGAs.

Jan Gray

Proceedings of the 2000 workshop on Computer architecture education, 2000