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Jammala Venkataramanaiah

Orcid: 0000-0002-9818-9547

According to our database1, Jammala Venkataramanaiah authored at least 3 papers between 2020 and 2022.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
A novel single source multilevel inverter with hybrid switching technique.
[BibTeX]
[DOI]
Bhukya Nageswar Rao
,
Yellasiri Suresh
,
Banavath Shiva Naik
,
Jammala Venkataramanaiah
,
Kancharapu Aditya
,
Anup Kumar Panda
Int. J. Circuit Theory Appl., 2022

2021
A Hybrid Nine-Level Inverter Topology With Boosting Capability and Reduced Component Count.
[BibTeX]
[DOI]
Banavath Shiva Naik
,
Yellasiri Suresh
,
Jammala Venkataramanaiah
,
Anup Kumar Panda
IEEE Trans. Circuits Syst. II Express Briefs, 2021

2020
Experimental verification of a hybrid multilevel inverter with voltage-boosting ability.
[BibTeX]
[DOI]
Banavath Shiva Naik
,
Yellasiri Suresh
,
Jammala Venkataramanaiah
Int. J. Circuit Theory Appl., 2020


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