Jamie Garside

According to our database1, Jamie Garside authored at least 7 papers between 2013 and 2017.

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Bibliography

2017
A Globally Arbitrated Memory Tree for Mixed-Time-Criticality Systems.
IEEE Trans. Computers, 2017

2015
Real-time prefetching on shared-memory multi-core systems.
PhD thesis, 2015

T-CREST: Time-predictable multi-core architecture for embedded systems.
J. Syst. Archit., 2015

Transparent hardware synthesis of Java for predictable large-scale distributed systems.
CoRR, 2015

A generic, scalable and globally arbitrated memory tree for shared DRAM access in real-time systems.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
WCET Preserving Hardware Prefetch for Many-Core Real-Time Systems.
Proceedings of the 22nd International Conference on Real-Time Networks and Systems, 2014

2013
Prefetching across a shared memory tree within a Network-on-Chip architecture.
Proceedings of the 2013 International Symposium on System on Chip, 2013


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