James W. Adkisson

According to our database, James W. Adkisson authored at least 3 papers between 1995 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2018

Impact of Emitter Width Scaling on Performance and Ruggedness of SiGe HBTs for PA Applications.

Saurabh Sirohi, Vibhor Jain, Ajay Raman, Bhargava Teja Nukala, Elan Veeramani, James W. Adkisson, Alvin Joseph

Proceedings of the 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2018

1995

A half-micron CMOS logic generation.

Charles W. Koburger III, William F. Clark, James W. Adkisson, Eric Adler, Paul E. Bakeman, Albert S. Bergendahl, Alan B. Botula, W. Chang, Bijan Davari, John H. Givens, Howard H. Hansen, Steven J. Holmes, David V. Horak, Chung Hon Lam, Jerome B. Lasky, Stephen E. Luce, Randy W. Mann, Glen L. Miles, James S. Nakos, Edward J. Nowak, Ghavam G. Shahidi, Yuan Taur, Francis R. White, Matthew R. Wordeman

IBM J. Res. Dev., 1995

Overview of gate linewidth control in the manufacture of CMOS logic chips.

Donald G. Chesebro, James W. Adkisson, Lyman R. Clark, Steven N. Eslinger, Margaret A. Faucher, Steven J. Holmes, Raymond P. Mallette, Edward J. Nowak, Edward W. Sengle, Steven H. Voldman, Thomas W. Weeks

IBM J. Res. Dev., 1995