James Sage

According to our database1, James Sage authored at least 5 papers between 2000 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2014
Efficient testing of hierarchical core-based SOCs.
Proceedings of the 2014 International Test Conference, 2014

2008
A Power-Aware Test Methodology for Multi-Supply Multi-Voltage Designs.
Proceedings of the 2008 IEEE International Test Conference, 2008

2007
Achieving serendipitous N-detect mark-offs in Multi-Capture-Clock scan patterns.
Proceedings of the 2007 IEEE International Test Conference, 2007

2000
Test structure verification of logical BIST: problems and solutions.
Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

An Automatic Validation Methodology for Logic BIST in High Performance VLSI Design.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000


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