James S. Humble

According to our database, James S. Humble authored at least 3 papers between 2006 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2009

A 20 GS/s 5-Bit SiGe BiCMOS Dual-Nyquist Flash ADC With Sampling Capability up to 35 GS/s Featuring Offset Corrected Exclusive-Or Comparators.

Robert A. Kertis, James S. Humble, Mary A. Daun-Lindberg, Rick A. Philpott, Karl E. Fritz, Daniel J. Schwab, Jason F. Prairie, Barry K. Gilbert, Erik S. Daniel

IEEE J. Solid State Circuits, 2009

2008

A 20Gb/s SerDes transmitter with adjustable source impedance and 4-tap feed-forward equalization in 65nm bulk CMOS.

Rick A. Philpott, James S. Humble, Robert A. Kertis, Karl E. Fritz, Barry K. Gilbert, Erik S. Daniel

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2006

A Clock Duty-Cycle Correction and Adjustment Circuit.

James S. Humble, Patrick J. Zabinski, Barry K. Gilbert, Erik S. Daniel

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006