James R. Goodman

According to our database, James R. Goodman authored at least 49 papers between 1972 and 2014.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2014

Author retrospective for code scheduling and register allocation in large basic blocks.

James R. Goodman, Wei-Chung Hsu

Proceedings of the ACM International Conference on Supercomputing 25th Anniversary Volume, 2014

2011

Transactional conflict decoupling and value prediction.

Fuad Tabba, Andrew W. Hay, James R. Goodman

Proceedings of the 25th International Conference on Supercomputing, 2011, Tucson, AZ, USA, May 31, 2011

2009

NZTM: nonblocking zero-indirection transactional memory.

Fuad Tabba, Mark Moir, James R. Goodman, Andrew W. Hay, Cong Wang

Proceedings of the SPAA 2009: Proceedings of the 21st Annual ACM Symposium on Parallelism in Algorithms and Architectures, 2009

2004

Inferential Queueing and Speculative Push.

Ravi Rajwar, Alain Kägi, James R. Goodman

Int. J. Parallel Program., 2004

Billion-Transistor Architectures: There and Back Again.

Doug Burger, James R. Goodman

Computer, 2004

Computerarchitektur - Strukturen, Konzepte, Grundlagen, 4. Auflage.

Andrew S. Tanenbaum, James R. Goodman

Pearson Studium, ISBN: 978-3-8273-7148-5, 2004

2003

Transactional Execution: Toward Reliable, High-Performance Multithreading.

Ravi Rajwar, James R. Goodman

IEEE Micro, 2003

Inferential queueing and speculative push for reducing critical communication latencies.

Ravi Rajwar, Alain Kägi, James R. Goodman

Proceedings of the 17th Annual International Conference on Supercomputing, 2003

2002

Transactional lock-free execution of lock-based programs.

Ravi Rajwar, James R. Goodman

Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), 2002

2001

Speculative lock elision: enabling highly concurrent multithreaded execution.

Ravi Rajwar, James R. Goodman

Proceedings of the 34th Annual International Symposium on Microarchitecture, 2001

Computerarchitektur - Strukturen, Konzepte, Grundlagen, 4. Auflage.

Andrew S. Tanenbaum, James R. Goodman

Pearson Studium, ISBN: 978-3-8273-7016-7, 2001

2000

Improving the Throughput of Synchronization by Insertion of Delays.

Ravi Rajwar, Alain Kägi, James R. Goodman

Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, 2000

1999

DataScalar: A memory-centric approach to computing.

Stefanos Kaxiras, Doug Burger, James R. Goodman

J. Syst. Archit., 1999

Improving CC-NUMA Performance Using Instruction-Based Prediction.

Stefanos Kaxiras, James R. Goodman

Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, 1999

1998

Using Cache Memory to Reduce Processor-Memory Traffic.

James R. Goodman

Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

Retrospective: Using Cache Memory to Reduce Processor-Memory Traffic.

James R. Goodman

Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

A Study of Three Dynamic Approaches to Handle Widely Shared Data in Shared-memory Multiprocessors.

Stefanos Kaxiras, Stein Gjessing, James R. Goodman

Proceedings of the 12th international conference on Supercomputing, 1998

1997

Limited bandwidth to affect processor design.

Doug Burger, James R. Goodman, Alain Kägi

IEEE Micro, 1997

Billion-Transistor Architectures - Guest Editors' Introduction.

Doug Burger, James R. Goodman

Computer, 1997

Efficient Synchronization: Let Them Eat QOLB.

Alain Kägi, Doug Burger, James R. Goodman

Proceedings of the 24th International Symposium on Computer Architecture, 1997

DataScalar Architectures.

Doug Burger, Stefanos Kaxiras, James R. Goodman

Proceedings of the 24th International Symposium on Computer Architecture, 1997

Memory Systems.

Doug Burger, James R. Goodman, Gurindar S. Sohi

Proceedings of the Computer Science and Engineering Handbook, 1997

1996

Memory Bandwidth Limitations of Future Microprocessors.

Doug Burger, James R. Goodman, Alain Kägi

Proceedings of the 23rd Annual International Symposium on Computer Architecture, 1996

The GLOW Cache Coherence Protocol Extensions for Widely Shared Data.

Stefanos Kaxiras, James R. Goodman

Proceedings of the 10th international conference on Supercomputing, 1996

1995

Techniques for Reducing Overheads of Shared-Memory Multiprocessing.

Alain Kägi, Nagi Aboulenein, Doug Burger, James R. Goodman

Proceedings of the 9th international conference on Supercomputing, 1995

1994

The Impact of Pipelined Channels on k-ary n-Cube Networks.

Steven L. Scott, James R. Goodman

IEEE Trans. Parallel Distributed Syst., 1994

Hardware Support for Synchronization in the Scalable Coherent Interface (SCI).

Nagi Aboulenein, James R. Goodman, Stein Gjessing, Philip J. Woest

Proceedings of the 8th International Symposium on Parallel Processing, 1994

1993

Performance of Pruning-Cache Directories for Large-Scale Multiprocessors.

Steven L. Scott, James R. Goodman

IEEE Trans. Parallel Distributed Syst., 1993

1992

Report of the Purdue Workshop on Grand Challenges in Computer Architecture for the Support of High Performance Computing.

Howard Jay Siegel, Seth Abraham, William L. Bain, Kenneth E. Batcher, Thomas L. Casavant, Doug DeGroot, Jack B. Dennis, David C. Douglas, Tse-Yun Feng, James R. Goodman, Alan Huang, Harry F. Jordan, J. Robert Jamp, Yale N. Patt, Alan Jay Smith, James E. Smith, Lawrence Snyder, Harold S. Stone, Russ Tuck, Benjamin W. Wah

J. Parallel Distributed Comput., 1992

Performance of the SCI Ring.

Steven L. Scott, James R. Goodman, Mary K. Vernon

Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992

Synthesizing General Topologies from Rings.

Ross E. Johnson, James R. Goodman

Proceedings of the 1992 International Conference on Parallel Processing, 1992

1989

On the Minimization of Loads/Stores in Local Register Allocation.

Wei-Chung Hsu, Charles N. Fischer, James R. Goodman

IEEE Trans. Software Eng., 1989

Restricted Fetch&Phi operations for parallel processing.

Gurindar S. Sohi, James E. Smith, James R. Goodman

Proceedings of the 3rd international conference on Supercomputing, 1989

Efficent Synchronization Primitives for Large-Scale Cache-Coherent Multiprocessors.

James R. Goodman, Mary K. Vernon, Philip J. Woest

Proceedings of the ASPLOS-III Proceedings, 1989

1988

Reply to David R. Cheriton's, Pat Boyle's, and Gert A. Slavenburg's "Comments on 'Coherency for multiprocessor virtual addressed caches' by James R. Goodman".

James R. Goodman

SIGARCH Comput. Archit. News, 1988

The Wisconsin Multicube: A New Large-Scale Cache-Coherent Multiprocessor.

James R. Goodman, Philip J. Woest

Proceedings of the 15th Annual International Symposium on Computer Architecture, 1988

Code scheduling and register allocation in large basic blocks.

James R. Goodman, Wei-Chung Hsu

Proceedings of the 2nd international conference on Supercomputing, 1988

1987

WISQ: A Restartable Architecture Using Queues.

Andrew R. Pleszkun, James R. Goodman, Wei-Chung Hsu, R. T. Joersz, George E. Bier, Philip J. Woest, P. B. Schechter

Proceedings of the 14th Annual International Symposium on Computer Architecture. Pittsburgh, 1987

Coherency for Multiprocessor Virtual Address Caches.

James R. Goodman

Proceedings of the Second International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS II), 1987

1986

Comments on "A Massive Memory Machine".

James R. Goodman, Honesty C. Young

IEEE Trans. Computers, 1986

On the Use of Registers vs. Cache to Minimize Memory Traffic.

James R. Goodman, Wei-Chung Hsu

Proceedings of the 13th Annual Symposium on Computer Architecture, Tokyo, Japan, June 1986, 1986

The Design of a Queue-Based Vector Supercomputer.

Honesty C. Young, James R. Goodman

Proceedings of the International Conference on Parallel Processing, 1986

1985

Instruction Cache Replacement Policies and Organizations.

James E. Smith, James R. Goodman

IEEE Trans. Computers, 1985

PIPE: A VLSI Decoupled Architecture.

James R. Goodman, Jian-tu Hsieh, Koujuch Liou, Andrew R. Pleszkun, P. B. Schechter, Honesty C. Young

Proceedings of the 12th Annual Symposium on Computer Architecture, 1985

1984

The Use of Static Column RAM as a Memory Hierarchy.

James R. Goodman, MenChow Chiang

Proceedings of the 11th Annual Symposium on Computer Architecture, 1984

1983

A Study of Instruction Cache Organizations and Replacement Policies

James E. Smith, James R. Goodman

Proceedings of the 10th Annual Symposium on Computer Architecture, 1983, 1983

1982

VLSI Considerations that Influence Data Flow Architecture.

Chinya V. Ravishankar, James R. Goodman

Proceedings of the COMPCON'82, 1982

1981

Hypertree: A Multiprocessor Interconnection Topology.

James R. Goodman, Carlo H. Séquin

IEEE Trans. Computers, 1981

1972

Some Properties of Iterative Square-Rooting Methods Using High-Speed Multiplication.

Chittoor V. Ramamoorthy, James R. Goodman, K. H. Kim

IEEE Trans. Computers, 1972