James Poe

According to our database, James Poe authored at least 7 papers between 2006 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2009

TransPlant: A parameterized methodology for generating transactional memory workloads.

James Poe, Clay Hughes, Tao Li

Proceedings of the 17th Annual Meeting of the IEEE/ACM International Symposium on Modelling, 2009

Accurate, scalable and informative design space exploration for large and sophisticated multi-core oriented architectures.

Chang-Burm Cho, James Poe, Tao Li, Jingling Yuan

Proceedings of the 17th Annual Meeting of the IEEE/ACM International Symposium on Modelling, 2009

On the (dis)similarity of transactional memory workloads.

Clay Hughes, James Poe, Amer Qouneh, Tao Li

Proceedings of the 2009 IEEE International Symposium on Workload Characterization, 2009

TransMetric: architecture independent workload characterization for transactional memory benchmarks.

James Poe, Clay Hughes, Tao Li

Proceedings of the 23rd international conference on Supercomputing, 2009

2008

Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design.

James Poe, Chang-Burm Cho, Tao Li

Proceedings of the 20th International Symposium on Computer Architecture and High Performance Computing, 2008

2006

BASS: a benchmark suite for evaluating architectural security systems.

James Poe, Tao Li

SIGARCH Comput. Archit. News, 2006

Characterizing Microarchitecture Soft Error Vulnerability Phase Behavior.

Xin Fu, James Poe, Tao Li, José A. B. Fortes

Proceedings of the 14th International Symposium on Modeling, 2006