James Laudon

According to our database, James Laudon authored at least 44 papers between 1987 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

Scalable Multi-Domain Adaptation of Language Models using Modular Experts.

Peter Schafhalter, Shun Liao, Yanqi Zhou, Chih-Kuan Yeh, Arun Kandoor, James Laudon

CoRR, 2024

2023

GiPH: Generalizable Placement Learning for Adaptive Heterogeneous Computing.

Yi Hu, Chaoran Zhang, Edward Andert, Harshul Singh, Aviral Shrivastava, James Laudon, Yanqi Zhou, Bob Iannucci, Carlee Joe-Wong

Proceedings of the Sixth Conference on Machine Learning and Systems, 2023

Brainformers: Trading Simplicity for Efficiency.

Yanqi Zhou, Nan Du, Yanping Huang, Daiyi Peng, Chang Lan, Da Huang, Siamak Shakeri, David R. So, Andrew M. Dai, Yifeng Lu, Zhifeng Chen, Quoc V. Le, Claire Cui, James Laudon, Jeff Dean

Proceedings of the International Conference on Machine Learning, 2023

Lifelong Language Pretraining with Distribution-Specialized Experts.

Wuyang Chen, Yanqi Zhou, Nan Du, Yanping Huang, James Laudon, Zhifeng Chen, Claire Cui

Proceedings of the International Conference on Machine Learning, 2023

2022

Mixture-of-Experts with Expert Choice Routing.

Yanqi Zhou, Tao Lei, Hanxiao Liu, Nan Du, Yanping Huang, Vincent Y. Zhao, Andrew M. Dai, Zhifeng Chen, Quoc V. Le, James Laudon

Proceedings of the Advances in Neural Information Processing Systems 35: Annual Conference on Neural Information Processing Systems 2022, 2022

Towards the Co-design of Neural Networks and Accelerators.

Yanqi Zhou, Xuanyi Dong, Tianjian Meng, Mingxing Tan, Berkin Akin, Daiyi Peng, Amir Yazdanbakhsh, Da Huang, Ravi Narayanaswami, James Laudon

Proceedings of the Fifth Conference on Machine Learning and Systems, 2022

A Transferable Approach for Partitioning Machine Learning Models on Multi-Chip-Modules.

Xinfeng Xie, Prakash Prabhu, Ulysse Beaugnon, Phitchaya Mangpo Phothilimthana, Sudip Roy, Azalia Mirhoseini, Eugene Brevdo, James Laudon, Yanqi Zhou

Proceedings of the Fifth Conference on Machine Learning and Systems, 2022

An Evaluation of Edge TPU Accelerators for Convolutional Neural Networks.

Kiran Seshadri, Berkin Akin, James Laudon, Ravi Narayanaswami, Amir Yazdanbakhsh

Proceedings of the IEEE International Symposium on Workload Characterization, 2022

2021

A graph placement methodology for fast chip design.

Azalia Mirhoseini, Anna Goldie, Mustafa Yazgan, Joe Wenjie Jiang, Ebrahim M. Songhori, Shen Wang, Young-Joon Lee, Eric Johnson, Omkar Pathak, Azade Nazi, Jiwoo Pak, Andy Tong, Kavya Srinivasa, William Hang, Emre Tuncer, Quoc V. Le, James Laudon, Richard Ho, Roger Carpenter, Jeff Dean

Nat., 2021

The Design Process for Google's Training Chips: TPUv2 and TPUv3.

Thomas Norrie, Nishant Patil, Doe Hyun Yoon, George Kurian, Sheng Li, James Laudon, Cliff Young, Norman P. Jouppi, David A. Patterson

IEEE Micro, 2021

Rethinking Co-design of Neural Architectures and Hardware Accelerators.

Yanqi Zhou, Xuanyi Dong, Berkin Akin, Mingxing Tan, Daiyi Peng, Tianjian Meng, Amir Yazdanbakhsh, Da Huang, Ravi Narayanaswami, James Laudon

CoRR, 2021

Apollo: Transferable Architecture Exploration.

Amir Yazdanbakhsh, Christof Angermüller, Berkin Akin, Yanqi Zhou, Albin Jones, Milad Hashemi, Kevin Swersky, Satrajit Chatterjee, Ravi Narayanaswami, James Laudon

CoRR, 2021

Ten Lessons From Three Generations Shaped Google's TPUv4i : Industrial Product.

Norman P. Jouppi, Doe Hyun Yoon, Matthew Ashcraft, Mark Gottscho, Thomas B. Jablin, George Kurian, James Laudon, Sheng Li, Peter C. Ma, Xiaoyu Ma, Thomas Norrie, Nishant Patil, Sushma Prasad, Cliff Young, Zongwei Zhou, David A. Patterson

Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

2020

A Single-Shot Generalized Device Placement for Large Dataflow Graphs.

Yanqi Zhou, Sudip Roy, AmirAli Abdolrashidi, Daniel Lin-Kit Wong, Peter C. Ma, Qiumin Xu, Azalia Mirhoseini, James Laudon

IEEE Micro, 2020

Chip Placement with Deep Reinforcement Learning.

Azalia Mirhoseini, Anna Goldie, Mustafa Yazgan, Joe W. J. Jiang, Ebrahim M. Songhori, Shen Wang, Young-Joon Lee, Eric Johnson, Omkar Pathak, Sungmin Bae, Azade Nazi, Jiwoo Pak, Andy Tong, Kavya Srinivasa, William Hang, Emre Tuncer, Anand Babu, Quoc V. Le, James Laudon, Richard Ho, Roger Carpenter, Jeff Dean

CoRR, 2020

A domain-specific supercomputer for training deep neural networks.

Norman P. Jouppi, Doe Hyun Yoon, George Kurian, Sheng Li, Nishant Patil, James Laudon, Cliff Young, David A. Patterson

Commun. ACM, 2020

Transferable Graph Optimizers for ML Compilers.

Yanqi Zhou, Sudip Roy, AmirAli Abdolrashidi, Daniel Wong, Peter C. Ma, Qiumin Xu, Hanxiao Liu, Mangpo Phitchaya Phothilimtha, Shen Wang, Anna Goldie, Azalia Mirhoseini, James Laudon

Proceedings of the Advances in Neural Information Processing Systems 33: Annual Conference on Neural Information Processing Systems 2020, 2020

Google's Training Chips Revealed: TPUv2 and TPUv3.

Thomas Norrie, Nishant Patil, Doe Hyun Yoon, George Kurian, Sheng Li, James Laudon, Cliff Young, Norman P. Jouppi, David A. Patterson

Proceedings of the IEEE Hot Chips 32 Symposium, 2020

2019

GDP: Generalized Device Placement for Dataflow Graphs.

Yanqi Zhou, Sudip Roy, AmirAli Abdolrashidi, Daniel Lin-Kit Wong, Peter C. Ma, Qiumin Xu, Ming Zhong, Hanxiao Liu, Anna Goldie, Azalia Mirhoseini, James Laudon

CoRR, 2019

2017

In-Datacenter Performance Analysis of a Tensor Processing Unit.

Norman P. Jouppi, Cliff Young, Nishant Patil, David A. Patterson, Gaurav Agrawal, Raminder Bajwa, Sarah Bates, Suresh Bhatia, Nan Boden, Al Borchers, Rick Boyle, Pierre-luc Cantin, Clifford Chao, Chris Clark, Jeremy Coriell, Mike Daley, Matt Dau, Jeffrey Dean, Ben Gelb, Tara Vazir Ghaemmaghami, Rajendra Gottipati, William Gulland, Robert Hagmann, C. Richard Ho, Doug Hogberg, John Hu, Robert Hundt, Dan Hurt, Julian Ibarz, Aaron Jaffey, Alek Jaworski, Alexander Kaplan, Harshit Khaitan, Andy Koch, Naveen Kumar, Steve Lacy, James Laudon, James Law, Diemthu Le, Chris Leary, Zhuyuan Liu, Kyle Lucke, Alan Lundin, Gordon MacKean, Adriana Maggiore, Maire Mahony, Kieran Miller, Rahul Nagarajan, Ravi Narayanaswami, Ray Ni, Kathy Nix, Thomas Norrie, Mark Omernick, Narayana Penukonda, Andy Phelps, Jonathan Ross, Amir Salek, Emad Samadiani, Chris Severn, Gregory Sizikov, Matthew Snelham, Jed Souter, Dan Steinberg, Andy Swing, Mercedes Tan, Gregory Thorson, Bo Tian, Horia Toma, Erick Tuttle, Vijay Vasudevan, Richard Walter, Walter Wang, Eric Wilcox, Doe Hyun Yoon

CoRR, 2017

In-Datacenter Performance Analysis of a Tensor Processing Unit.

Norman P. Jouppi, Cliff Young, Nishant Patil, David A. Patterson, Gaurav Agrawal, Raminder Bajwa, Sarah Bates, Suresh Bhatia, Nan Boden, Al Borchers, Rick Boyle, Pierre-luc Cantin, Clifford Chao, Chris Clark, Jeremy Coriell, Mike Daley, Matt Dau, Jeffrey Dean, Ben Gelb, Tara Vazir Ghaemmaghami, Rajendra Gottipati, William Gulland, Robert Hagmann, C. Richard Ho, Doug Hogberg, John Hu, Robert Hundt, Dan Hurt, Julian Ibarz, Aaron Jaffey, Alek Jaworski, Alexander Kaplan, Harshit Khaitan, Daniel Killebrew, Andy Koch, Naveen Kumar, Steve Lacy, James Laudon, James Law, Diemthu Le, Chris Leary, Zhuyuan Liu, Kyle Lucke, Alan Lundin, Gordon MacKean, Adriana Maggiore, Maire Mahony, Kieran Miller, Rahul Nagarajan, Ravi Narayanaswami, Ray Ni, Kathy Nix, Thomas Norrie, Mark Omernick, Narayana Penukonda, Andy Phelps, Jonathan Ross, Matt Ross, Amir Salek, Emad Samadiani, Chris Severn, Gregory Sizikov, Matthew Snelham, Jed Souter, Dan Steinberg, Andy Swing, Mercedes Tan, Gregory Thorson, Bo Tian, Horia Toma, Erick Tuttle, Vijay Vasudevan, Richard Walter, Walter Wang, Eric Wilcox, Doe Hyun Yoon

Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

2009

Throughput-Oriented Multicore Processors.

James Laudon, Robert T. Golla, Greg Grohoski

Proceedings of the Multicore Processors and Systems, 2009

2007

iChip Multiprocessor Architecture: Techniques to Improve Throughput and Latency

Kunle Olukotun, Lance Hammond, James Laudon

Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01720-9, 2007

The Coming Wave of Multithreaded Chip Multiprocessors.

James Laudon, Lawrence Spracklen

Int. J. Parallel Program., 2007

Virtual private caches.

Kyle J. Nesbit, James Laudon, James E. Smith

Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007

2006

Multi-Core Microprocessors Are Here.

Richard McDougall, James Laudon

login Usenix Mag., 2006

Fair Queuing Memory Systems.

Kyle J. Nesbit, Nidhi Aggarwal, James Laudon, James E. Smith

Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006

2005

Performance/Watt: the new server focus.

James Laudon

SIGARCH Comput. Archit. News, 2005

The RASE (Rapid, Accurate Simulation Environment) for chip multiprocessors.

John D. Davis, Cong Fu, James Laudon

SIGARCH Comput. Archit. News, 2005

Maximizing CMP Throughput with Mediocre Cores.

John D. Davis, James Laudon, Kunle Olukotun

Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (PACT 2005), 2005

1998

The DASH Prototype: Implementation and Performance.

Daniel Lenoski, James Laudon, Truman Joe, David Nakahira, Luis Stevens, Anoop Gupta, John L. Hennessy

Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

Retrospective: The DASH Prototype: Implementation and Performance.

Daniel Lenoski, James Laudon

Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

1997

The SGI Origin: A ccNUMA Highly Scalable Server.

James Laudon, Daniel Lenoski

Proceedings of the 24th International Symposium on Computer Architecture, 1997

System overview of the SGI Origin 200/2000 product line.

James Laudon, Daniel Lenoski

Proceedings of the Proceedings IEEE COMPCON 97, 1997

1994

Interleaving: A Multithreading Technique Targeting Multiprocessors and Workstations.

James Laudon, Anoop Gupta, Mark Horowitz

Proceedings of the ASPLOS-VI Proceedings, 1994

Architectural and Implementation Tradeoffs in the Design of Multiple-Context Processors.

James Laudon, Anoop Gupta, Mark Horowitz

Proceedings of the Multithreaded Computer Architecture, 1994

1993

The DASH Prototype: Logic Overhead and Performance.

Daniel Lenoski, James Laudon, Truman Joe, David Nakahira, Luis Stevens, Anoop Gupta, John L. Hennessy

IEEE Trans. Parallel Distributed Syst., 1993

1992

The Stanford Dash Multiprocessor.

Daniel Lenoski, James Laudon, Kourosh Gharachorloo, Wolf-Dietrich Weber, Anoop Gupta, John L. Hennessy, Mark Horowitz, Monica S. Lam

Computer, 1992

Architectural and implementation tradeoffs in the design of multiple-context processors.

James Laudon, Anoop Gupta, Mark Horowitz

Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992

1990

The Directory-Based Cache Coherence Protocol for the DASH Multiprocessor.

Daniel Lenoski, James Laudon, Kourosh Gharachorloo, Anoop Gupta, John L. Hennessy

Proceedings of the 17th Annual International Symposium on Computer Architecture, 1990

Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors.

Kourosh Gharachorloo, Daniel Lenoski, James Laudon, Phillip B. Gibbons, Anoop Gupta, John L. Hennessy

Proceedings of the 17th Annual International Symposium on Computer Architecture, 1990

Design of scalable shared-memory multiprocessors: the DASH approach.

Daniel Lenoski, Kourosh Gharachorloo, James Laudon, Anoop Gupta, John L. Hennessy, Mark Horowitz, Monica Lam

Proceedings of the Intellectual Leverage: Thirty-Fifth IEEE Computer Society International Conference, 1990

1988

The Astronautics ZS-1 processor.

James E. Smith, Gregory E. Dermer, B. D. Vanderwarn, S. D. Klinger, C. M. Rozewski, D. L. Fowler, K. R. Scidmore, James Laudon

Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

1987

The ZS-1 Central Processor.

James E. Smith, Gregory E. Dermer, B. D. Vanderwarn, S. D. Klinger, C. M. Rozewski, D. L. Fowler, K. R. Scidmore, James Laudon

Proceedings of the Second International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS II), 1987