James Harbin
Orcid: 0000-0002-6479-8600
According to our database1,
James Harbin
authored at least 22 papers
between 2009 and 2024.
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Bibliography
2024
Tree-Based versus Hybrid Graphical-Textual Model Editors: An Empirical Study of Testing Specifications.
Proceedings of the ACM/IEEE 27th International Conference on Model Driven Engineering Languages and Systems, 2024
2023
Softw. Syst. Model., October, 2023
2021
Proceedings of the 24th International Conference on Model Driven Engineering Languages and Systems, 2021
2020
ACM Trans. Cyber Phys. Syst., 2020
2019
Microprocess. Microsystems, 2019
Validating high level simulation results against experimental data and low level simulation: a case study.
Proceedings of the 27th International Conference on Real-Time Networks and Systems, 2019
2018
Proceedings of the 24th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2018
2017
Side-channel attack resilience through route randomisation in secure real-time Networks-on-Chip.
Proceedings of the 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2017
2016
Comparative performance evaluation of latency and link dynamic power consumption modelling algorithms in wormhole switching networks on chip.
J. Syst. Archit., 2016
2015
ACM Trans. Design Autom. Electr. Syst., 2015
Proceedings of the 13th IEEE International Conference on Industrial Informatics, 2015
Average and Worst-Case Latency Improvements in Mixed-Criticality Wormhole Networks-on-Chip.
Proceedings of the 27th Euromicro Conference on Real-Time Systems, 2015
2014
Proceedings of the IEEE 35th IEEE Real-Time Systems Symposium, 2014
Fine-Grained Link Locking Within Power and Latency Transaction Level Modelling in Wormhole Switching Non-Preemptive Networks On Chip.
Proceedings of the 5th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 3rd Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2014
2013
Int. J. Distributed Sens. Networks, 2013
Fast transaction-level dynamic power consumption modelling in priority preemptive wormhole switching networks on chip.
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013
Dynamic task remapping for power and latency performance improvement in priority-based non-preemptive Networks On Chip.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013
2012
Proceedings of the 3rd IEEE International Conference on Networked Embedded Systems for Every Application, 2012
2011
Reputation routing to avoid sybil attacks in wireless sensor networks using distributed beamforming.
Proceedings of the 8th International Symposium on Wireless Communication Systems, 2011
2010
Proceedings of the 2010 7th International Symposium on Wireless Communication Systems, 2010
2009
Proceedings of the 2009 6th International Symposium on Wireless Communication Systems, 2009