Jakub Lojda
According to our database1,
Jakub Lojda
authored at least 30 papers
between 2016 and 2024.
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Bibliography
2024
Proceedings of the 27th Euromicro Conference on Digital System Design, 2024
2023
The Fault-tolerant Single-FPGA Systems with a Self-repair Reconfiguration Controller.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023
2021
Proceedings of the 22nd IEEE Latin American Test Symposium, 2021
Proceedings of the IEEE East-West Design & Test Symposium, 2021
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021
2020
Reliability Analysis of Reconfiguration Controller for FPGA-Based Fault Tolerant Systems: Case Study.
Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020
Evaluation Platform For Testing Fault Tolerance: Testing Reliability of Smart Electronic Locks.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020
Proceedings of the IEEE East-West Design & Test Symposium, 2020
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020
Proceedings of the 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2020
2019
Proceedings of the IEEE Latin American Test Symposium, 2019
Reliability Indicators for Automatic Design and Analysis of Fault-Tolerant FPGA Systems.
Proceedings of the IEEE Latin American Test Symposium, 2019
Proceedings of the IEEE Latin American Test Symposium, 2019
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019
2018
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018
Partial Dynamic Reconfiguration in an FPGA-based Fault-Tolerant System: Simulation-based Evaluation.
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018
Fault Tolerance Properties of Systems Generated with the Use of High-Level Synthesis.
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018
Evaluation Platform for Testing Fault Tolerance Properties: Soft-core Processor-Based Experimental Robot Controller.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018
FT-EST Framework: Reliability Estimation for the Purposes of Fault-Tolerant System Design Automation.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018
2017
Microprocess. Microsystems, 2017
Comparison of FPNNs models approximation capabilities and FPGA resources utilization.
Proceedings of the 13th IEEE International Conference on Intelligent Computer Communication and Processing, 2017
Data types and operations modifications: A practical approach to fault tolerance in HLS.
Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017
Redundant data types and operations in HLS and their use for a robot controller unit fault tolerance evaluation.
Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017
Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017
Proceedings of the Euromicro Conference on Digital System Design, 2017
2016
Functional verification as a tool for monitoring impact of faults in SRAM-based FPGAs.
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016
Verification of Robot Controller for Evaluating Impacts of Faults in Electro-Mechanical Systems.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016