Jaime Velasco-Medina

Orcid: 0000-0003-4091-1055

According to our database1, Jaime Velasco-Medina authored at least 43 papers between 1998 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2021
Design of an S-ECIES Cryptoprocessor Using Gaussian Normal Bases Over GF(2<sup>m</sup>).
IEEE Trans. Very Large Scale Integr. Syst., 2021

Platform for Healthcare Promotion and Cardiovascular Disease Prevention.
IEEE J. Biomed. Health Informatics, 2021

2020
Structured Approach and Impedance Spectroscopy Microsystem for Fractional-Order Electrical Characterization of Vegetable Tissues.
IEEE Trans. Instrum. Meas., 2020

Lattice-Based Cryptoprocessor for CCA-Secure Identity-Based Encryption.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

2018
Hardware Accelerator for the Multifractal Analysis of DNA Sequences.
IEEE ACM Trans. Comput. Biol. Bioinform., 2018

Eye tracking-based behavioral study of users using e-voting systems.
Comput. Stand. Interfaces, 2018

2017
High-Throughput Ring-LWE Cryptoprocessors.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Half-Matrix Normal Basis Multiplier Over GF(p<sup>m</sup>).
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

SoC-FPGA implementation of the sparse fast fourier transform algorithm.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2016
Cooperative Wideband Spectrum Sensing Based on Sub-Nyquist Sparse Fast Fourier Transform.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

Review on graphene nanoribbon devices for logic applications.
Microelectron. J., 2016

Hardware implementation of FFT-based spectrum sensing techniques for cognitive radio.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

Bioimpedance measurement using mixed-signal embedded system.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

An Integration of Usable Security and User Authentication into the ISO 9241-210 and ISO/IEC 25010: 2011.
Proceedings of the Human Aspects of Information Security, Privacy, and Trust, 2016

2014
Embedded system for area measurement using FPGA.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

Hardware design of FFT polynomial multipliers.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

Design of elliptic curve cryptoprocessors over GF(2<sup>163</sup>) on Koblitz curves.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

Hardware implementation of the Smith-Waterman algorithm using a systolic architecture.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

2013
Design of an elliptic curve cryptoprocessor using optimal normal basis over GF(2<sup>233</sup>).
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

8912-bit Montgomery multipliers using radix-8 booth encoding and coded-digit.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

Hardware design of an eigensolver based on the QR method.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

Systolic architectures to evaluate polynomials of degree n using the Horner's rule.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

2012
Software-Based Testing for System Peripherals.
J. Electron. Test., 2012

2011
Functional Verification of DMA Controllers.
J. Electron. Test., 2011

Diseño de una Arquitectura para la Solucion de la Ecuacion de Schroedinger usando el Metodo de Numerov
CoRR, 2011

Functional test generation for the pLRU replacement mechanism of embedded cache memories.
Proceedings of the 12th Latin American Test Workshop, 2011

Hardware simulation of yeast glycolytic oscillations.
Proceedings of the 2011 IEEE International Conference on Bioinformatics and Biomedicine Workshops, 2011

2010
Hardware Architectures for Elliptic Curve Cryptoprocessors Using Polynomial and Gaussian Normal Basis over GF(2<sup>233</sup>).
Trans. Comput. Sci., 2010

Dependability validation of a cryptoprocessor to SEU effects.
Proceedings of the 11th Latin American Test Workshop, 2010

Functional test generation for DMA controllers.
Proceedings of the 11th Latin American Test Workshop, 2010

Bit-flip injection strategies for FSMs modeled in VHDL behavioral level.
Proceedings of the 11th Latin American Test Workshop, 2010

A software-based self-test methodology for system peripherals.
Proceedings of the 15th European Test Symposium, 2010

2009
Cytocomputation in a biologically inspired, dynamically reconfigurable hardware platform.
Proceedings of the IEEE Congress on Evolutionary Computation, 2009

2008
Design of a baseband processor for software radio using FPGAs.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

A Hybrid Approach to the Test of Cache Memory Controllers Embedded in SoCs.
Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

Software-Based Self-Test Strategy for Data Cache Memories Embedded in SoCs.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

2007
Total ionizing dose effects in switched-capacitor filters using oscillation-based test.
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007

1999
A Digital BIST for Operational Amplifiers Embedded in Mixed-Signal Circuits.
Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999

On-Line BIST for Testing Analog Circuits.
Proceedings of the IEEE International Conference On Computer Design, 1999

A One-Bit-Signature BIST for Embedded Operational Amplifiers in Mixed-Signal Circuits Based on the Slew-Rate Detection.
Proceedings of the 1999 Design, 1999

1998
Current-based testing for analog and mixed-signal circuits.
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

Fault Detection for Linear Analog Circuits Using Current Injection.
Proceedings of the 1998 Design, 1998

An Approach to the On-Line Testing of Operational Amplifiers.
Proceedings of the 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, 1998


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