Jaime H. Moreno

According to our database, Jaime H. Moreno authored at least 27 papers between 1986 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2019

Preparation and optimization of a diverse workload for a large-scale heterogeneous system.

Ian Karlin, Yoonho Park, Bronis R. de Supinski, Peng Wang, Bert Still, David Beckingsale, Robert Blake, Tong Chen, Guojing Cong, Carlos H. A. Costa, Johann Dahm, Giacomo Domeniconi, Thomas Epperly, Aaron Fisher, Sara Kokkila Schumacher, Steven H. Langer, Hai Le, Eun Kyung Lee, Naoya Maruyama, Xinyu Que, David F. Richards, Björn Sjögreen, Jonathan Wong, Carol S. Woodward, Ulrike Meier Yang, Xiaohua Zhang, Bob Anderson, David Appelhans, Levi Barnes, Peter D. Barnes Jr., Sorin Bastea, David Böhme, Jamie A. Bramwell, James M. Brase, José R. Brunheroto, Barry Chen, Charway R. Cooper, Tony Degroot, Robert D. Falgout, Todd Gamblin, David J. Gardner, James N. Glosli, John A. Gunnels, Max P. Katz, Tzanio V. Kolev, I-Feng W. Kuo, Matthew P. LeGendre, Ruipeng Li, Pei-Hung Lin, Shelby Lockhart, Kathleen McCandless, Claudia Misale, Jaime H. Moreno, Rob Neely, Jarom Nelson, Rao Nimmakayala, Kathryn M. O'Brien, Kevin O'Brien, Ramesh Pankajakshan, Roger Pearce, Slaven Peles, Phil Regier, Steven C. Rennich, Martin Schulz, Howard Scott, James C. Sexton, Kathleen Shoga, Shiv Sundram, Guillaume Thomas-Collignon, Brian Van Essen, Alexey Voronin, Bob Walkup, Lu Wang, Chris Ward, Hui-Fang Wen, Daniel A. White, Christopher Young, Cyril Zeller, Edward Zywicz

Proceedings of the International Conference for High Performance Computing, 2019

Benchmarking Summit and Sierra Supercomputers : From Proposal to Acceptance.

Jaime H. Moreno, Hui-Fang Wen

Proceedings of the 17th International Conference on High Performance Computing & Simulation, 2019

2016

Near-Memory Data Services.

Babak Falsafi, Mircea Stan, Kevin Skadron, Nuwan Jayasena, Yunji Chen, Jinhua Tao, Ravi Nair, Jaime H. Moreno, Naveen Muralimanohar, Karthikeyan Sankaralingam, Cristian Estan

IEEE Micro, 2016

2015

Active Memory Cube: A processing-in-memory architecture for exascale systems.

Ravi Nair, Samuel Antão, Carlo Bertolli, Pradip Bose, José R. Brunheroto, Tong Chen, Chen-Yong Cher, Carlos H. A. Costa, J. Doi, Constantinos Evangelinos, Bruce M. Fleischer, Thomas W. Fox, Diego S. Gallo, Leopold Grinberg, John A. Gunnels, Arpith C. Jacob, P. Jacob, Hans M. Jacobson, Tejas Karkhanis, C. Kim, Jaime H. Moreno, John K. O'Brien, Martin Ohmacht, Yoonho Park, Daniel A. Prener, Bryan S. Rosenburg, Kyung Dong Ryu, Olivier Sallenave, Mauricio J. Serrano, P. D. M. Siegl, Krishnan Sugavanam, Zehra Sura

IBM J. Res. Dev., 2015

2014

Near-Data Processing: Insights from a MICRO-46 Workshop.

Rajeev Balasubramonian, Jichuan Chang, Troy Manning, Jaime H. Moreno, Richard Murphy, Ravi Nair, Steven Swanson

IEEE Micro, 2014

3D stacking of high-performance processors.

Philip G. Emma, Alper Buyuktosunoglu, Michael B. Healy, Krishnan Kailas, Valentin Puente, Roy Yu, Allan Hartstein, Pradip Bose, Jaime H. Moreno, Eren Kursun

Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

2010

Extreme scale computing: Challenges and opportunities.

Josep Torrellas, Bill Gropp, Vivek Sarkar, Jaime H. Moreno, Kunle Olukotun

Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010

2009

True value: assessing and optimizing the cost of computing at the data center level.

John P. Karidis, José E. Moreira, Jaime H. Moreno

Proceedings of the 6th Conference on Computing Frontiers, 2009

2006

Chip-level integration: the new frontier for microprocessor architecture.

Jaime H. Moreno

Proceedings of the SPAA 2006: Proceedings of the 18th Annual ACM Symposium on Parallelism in Algorithms and Architectures, Cambridge, Massachusetts, USA, July 30, 2006

2004

Design methodology for semi custom processor cores.

Victor V. Zyuban, Sameh W. Asaad, Thomas W. Fox, Anne-Marie Haen, Daniel Littrell, Jaime H. Moreno

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

2003

An innovative low-power high-performance programmable signal processor for digital communications.

Jaime H. Moreno, Victor V. Zyuban, Uzi Shvadron, Fredy D. Neeser, Jeff H. Derby, Malcolm S. Ware, Krishnan Kailas, Ayal Zaks, Amir B. Geva, Shay Ben-David, Sameh W. Asaad, Thomas W. Fox, Daniel Littrell, Marina Biberstein, Dorit Naishlos, Hillery C. Hunter

IBM J. Res. Dev., 2003

Reducing instruction fetch energy with backwards branch control information and buffering.

Jude A. Rivers, Sameh W. Asaad, John-David Wellman, Jaime H. Moreno

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

A high-performance embedded DSP core with novel SIMD features.

Jeff H. Derby, Jaime H. Moreno

Proceedings of the 2003 IEEE International Conference on Acoustics, 2003

A new look at exploiting data parallelism in embedded systems.

Hillery C. Hunter, Jaime H. Moreno

Proceedings of the International Conference on Compilers, 2003

1999

Environment for PowerPC microarchitecture exploration.

Mayan Moudgill, John-David Wellman, Jaime H. Moreno

IEEE Micro, 1999

Validation of Turandot, a fast processor model for microarchitecture exploration.

Mayan Moudgill, Pradip Bose, Jaime H. Moreno

Proceedings of the IEEE International Performance Computing and Communications Conference, 1999

1997

Simulation/evaluation environment for a VLIW processor architecture.

Jaime H. Moreno, Mayan Moudgill, Kemal Ebcioglu, Erik R. Altman, C. Brian Hall, Rene Miranda, Shyh-Kwei Chen, Arkady Polyak

IBM J. Res. Dev., 1997

Scalable Instruction-Level Parallelism Through Tree-Instructions.

Jaime H. Moreno, Mayan Moudgill

Proceedings of the 11th international conference on Supercomputing, 1997

1993

Introduction.

Tomás Lang, Jaime H. Moreno

J. VLSI Signal Process., 1993

1992

MAMACG: a tool for automatic mapping of matrix algorithms onto mesh array computational graphs.

Dinh Lê, Milos D. Ercegovac, Tomás Lang, Jaime H. Moreno

Proceedings of the Application Specific Array Processors, 1992

1991

Linear pseudosystolic array for partitioned matrix algorithms.

Jaime H. Moreno, Miguel E. Figueroa, Tomás Lang

J. VLSI Signal Process., 1991

A decoupled access/execute processor for matrix algorithms: architecture and programming.

Jaime H. Moreno, Miguel E. Figueroa

Proceedings of the Application Specific Array Processors, 1991

1990

Matrix Computations on Systolic-Type Meshes.

Jaime H. Moreno, Tomás Lang

Computer, 1990

A graph-based approach to map matrix algorithms onto local-access processor arrays.

Jaime H. Moreno, Tomás Lang

Proceedings of the Application Specific Array Processors, 1990

1989

Comments on 'A systolic array for computing BA^-1'.

Jaime H. Moreno, Tomás Lang

IEEE Trans. Acoust. Speech Signal Process., 1989

1988

Graph-based Partitioning of Matrix Algorithms for Systolic Arrays: Application to Transitive Closure.

Jaime H. Moreno, Tomás Lang

Proceedings of the International Conference on Parallel Processing, 1988

1986

Replication and Pipelining in Multiple-Instance Algorithms.

Jaime H. Moreno, Tomás Lang

Proceedings of the International Conference on Parallel Processing, 1986