Jaideep Dastidar

Orcid: 0000-0003-4851-3350

According to our database1, Jaideep Dastidar authored at least 6 papers between 2009 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
The AMD 400-G Adaptive SmartNIC System on Chip: A Technology Preview.
IEEE Micro, 2023

FPGAs and Their Evolving Role in Domain Specific Architectures: A Case Study of the AMD 400G Adaptive SmartNIC/DPU SoC.
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

2022
AMD 400G Adaptive SmartNIC SoC: Technology preview.
Proceedings of the 2022 IEEE Hot Chips 34 Symposium, 2022

2020

2012
A full lifecycle performance verification methodology for multicore systems-on-chip.
ACM Trans. Design Autom. Electr. Syst., 2012

2009
System-level Performance Verification of Multicore Systems-on-Chip.
Proceedings of the 10th International Workshop on Microprocessor Test and Verification, 2009


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