Jai Narayan Tripathi
Orcid: 0000-0001-9109-2948
According to our database1,
Jai Narayan Tripathi
authored at least 30 papers
between 2009 and 2023.
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Bibliography
2023
A sub-picosecond resolution jitter instrument for GHz frequencies based on a sub-sampling TDA.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Special Session: A high-frequency sinusoidal signal generation using harmonic cancellation.
Proceedings of the 24th IEEE Latin American Test Symposium, 2023
A harmonic cancellation-based high-frequency on-chip sinusoidal signal generator with calibration using a coarse-fine delay cell.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Radial Basis Function Based Surrogate-Assisted Metaheuristic Approach for Variability Analysis.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023
2022
Novel Observations and Physical Insights on PSIJ Behavior in CMOS Chain-of-Inverters.
IEEE Access, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
On-chip calibration for high-speed harmonic cancellation-based sinusoidal signal generators.
Proceedings of the IEEE 31st Asian Test Symposium, 2022
2021
Neural-Network Based Modeling of I/O Buffer Predriver under Power/Ground Supply Voltage Variations.
Sensors, 2021
Analytical Modeling of Power Supply Induced Jitter in CMOS Inverters due to Periodic Fluctuations.
Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021
Optimal Design of a Decoupling Network Using Variants of Particle Swarm Optimization Algorithm.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
2020
Deterministic Noise Analysis for Single-Stage Amplifiers by Extension of Indefinite Admittance Matrix.
IEEE Open J. Circuits Syst., 2020
2019
A Thomas Algorithm-Based Generic Approach for Modeling of Power Supply Induced Jitter in CMOS Buffers.
IEEE Access, 2019
I/O Buffer Modelling for Power Supplies Noise Induced Jitter under Simultaneous Switching Outputs (SSO).
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019
Analysis of Timing Error Due to Supply and Substrate Noise in an Inverter Based High-Speed Comparator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
IEEE Trans. Very Large Scale Integr. Syst., 2018
2017
Proceedings of the International SoC Design Conference, 2017
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017
2015
Proceedings of the 28th IEEE International System-on-Chip Conference, 2015
Proceedings of the Computational Intelligence in Digital and Network Designs and Applications, 2015
2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
Power Integrity analysis and discrete optimization of decoupling capacitors on high speed power planes by particle swarm optimization.
Proceedings of the International Symposium on Quality Electronic Design, 2013
2012
Maintaining Power Integrity by damping the cavity-mode anti-resonances' peaks on a power plane by Particle Swarm Optimization.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012
Damping the cavity-mode anti-resonances' peaks on a power plane by swarm intelligence algorithms.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2011
Cost-effective optimization of serial link system for Signal Integrity and Power Integrity.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
2010
Proceedings of the 1st IEEE International Conference on Networked Embedded Systems for Enterprise Applications, 2010
Designing Asymmetric 2.4 GHz RF Oscillator for improving Signal Integrity by Design of Experiments.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
2009
Signal Integrity and Power Integrity Methodology for Robust Analysis of On-the-Board System for High Speed Serial Links.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009