Jai-Hoon Sim

According to our database1, Jai-Hoon Sim authored at least 2 papers between 1996 and 1997.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

1997
Low-voltage, high-speed circuit designs for gigabit DRAMs.
IEEE J. Solid State Circuits, 1997

1996
A 32-bank 1 Gb self-strobing synchronous DRAM with 1 GByte/s bandwidth.
IEEE J. Solid State Circuits, 1996


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