Jaeyung Jun
Orcid: 0000-0002-1840-8114
According to our database1,
Jaeyung Jun
authored at least 7 papers
between 2016 and 2023.
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Bibliography
2023
System Optimization of Data Analytics Platforms using Compute Express Link (CXL) Memory.
Proceedings of the IEEE International Conference on Big Data and Smart Computing, 2023
2019
ACM Trans. Design Autom. Electr. Syst., 2019
Reducing DRAM Refresh Rate Using Retention Time Aware Universal Hashing Redundancy Repair.
ACM Trans. Design Autom. Electr. Syst., 2019
Design and Implementation of Display Stream Compression Decoder With Line Buffer Optimization.
IEEE Trans. Consumer Electron., 2019
2018
Recovering from Biased Distribution of Faulty Cells in Memory by Reorganizing Replacement Regions through Universal Hashing.
ACM Trans. Design Autom. Electr. Syst., 2018
2017
A decoupled bit shifting technique using data encoding/decoding for DRAM redundancy repair.
IEICE Electron. Express, 2017
2016
High-throughput low-area design of AES using constant binary matrix-vector multiplication.
Microprocess. Microsystems, 2016