Jaehyun Park

Orcid: 0000-0001-5623-6985

Affiliations:

Seoul National University, Department of Intelligence and Information, Korea

According to our database¹, Jaehyun Park authored at least 15 papers between 2020 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

Legend:

Book

In proceedings

Article

PhD thesis

Dataset

Other

Bibliography

2024

GraNDe: Efficient Near-Data Processing Architecture for Graph Neural Networks.

[BibT_eX]

[DOI]

IEEE Trans. Computers, October, 2024

DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands.

[BibT_eX]

[DOI]

Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

CLAY: CXL-based Scalable NDP Architecture Accelerating Embedding Layers.

[BibT_eX]

[DOI]

Proceedings of the 38th ACM International Conference on Supercomputing, 2024

TAROT: A CXL SmartNIC-Based Defense Against Multi-bit Errors by Row-Hammer Attacks.

[BibT_eX]

[DOI]

Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

AttAcc! Unleashing the Power of PIM for Batched Transformer-based Generative Model Inference.

[BibT_eX]

[DOI]

Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023

X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2023

Unleashing the Potential of PIM: Accelerating Large Batched Inference of Transformer-Based Generative Models.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2023

How to Kill the Second Bird with One ECC: The Pursuit of Row Hammer Resilient DRAM.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

SHADOW: Preventing Row Hammer in DRAM with Intra-Subarray Row Shuffling.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

2022

MVP: An Efficient CNN Accelerator with Matrix, Vector, and Processing-Near-Memory Units.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2022

GraNDe: Near-Data Processing Architecture With Adaptive Matrix Mapping for Graph Convolutional Networks.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2022

Mithril: Cooperative Row Hammer Protection on Commodity DRAM Leveraging Managed Refresh.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

2021

TRiM: Tensor Reduction in Memory.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2021

TRiM: Enhancing Processor-Memory Interfaces with Scalable Tensor Reduction in Memory.

[BibT_eX]

[DOI]

Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

2020

MViD: Sparse Matrix-Vector Multiplication in Mobile DRAM for Accelerating Recurrent Neural Networks.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2020

Jaehyun Park

Timeline

Legend:

Links

Online presence:

On csauthors.net:

Bibliography

Loading...