Jaehyuk Huh
Orcid: 0000-0002-1742-047XAffiliations:
- KAIST, Korea
According to our database1,
Jaehyuk Huh
authored at least 84 papers
between 2001 and 2025.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
-
on dl.acm.org
On csauthors.net:
Bibliography
2025
CoRR, January, 2025
2024
ACM Trans. Archit. Code Optim., June, 2024
ACM Trans. Archit. Code Optim., March, 2024
Proceedings of the 2024 ACM SIGPLAN International Symposium on Memory Management, 2024
pSyncPIM: Partially Synchronous Execution of Sparse Matrix Operations for All-Bank PIM Architectures.
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024
Proceedings of the 42nd IEEE International Conference on Computer Design, 2024
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024
2023
Improving Data Reuse in NPU On-chip Memory with Interleaved Gradient Order for DNN Training.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023
Proceedings of the IEEE International Symposium on Workload Characterization, 2023
2022
IEEE Trans. Computers, 2022
Serving Heterogeneous Machine Learning Models on Multi-GPU Servers with Spatio-Temporal Sharing.
Proceedings of the 2022 USENIX Annual Technical Conference, 2022
Proceedings of the IEEE 40th International Conference on Computer Design, 2022
Proceedings of the IEEE 40th International Conference on Computer Design, 2022
TNPU: Supporting Trusted Execution with Tree-less Integrity Protection for Neural Processing Unit.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022
2021
IEEE Trans. Dependable Secur. Comput., 2021
ACM Trans. Archit. Code Optim., 2021
CoRR, 2021
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021
InnerSP: A Memory Efficient Sparse Matrix Multiplication Accelerator with Locality-Aware Inner Product Processing.
Proceedings of the 30th International Conference on Parallel Architectures and Compilation Techniques, 2021
2020
Reconciling Time Slice Conflicts of Virtual Machines With Dual Time Slice for Clouds.
IEEE Trans. Parallel Distributed Syst., 2020
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020
2019
IEEE Trans. Parallel Distributed Syst., 2019
IEEE Trans. Computers, 2019
ACM Trans. Archit. Code Optim., 2019
Proceedings of the Fourteenth EuroSys Conference 2019, Dresden, Germany, March 25-28, 2019, 2019
Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019
2018
Exploring the Design Space of Fair Scheduling Supports for Asymmetric Multicore Systems.
IEEE Trans. Computers, 2018
IEEE Comput. Archit. Lett., 2018
Efficient Hardware-Assisted Logging with Asynchronous and Direct-Update for Persistent Memory.
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018
Accelerating critical OS services in virtualized systems with flexible micro-sliced cores.
Proceedings of the Thirteenth EuroSys Conference, 2018
Proceedings of the ACM Symposium on Cloud Computing, 2018
Proceedings of the ACM Symposium on Cloud Computing, 2018
2017
Configuration Guidance Framework for Molecular Dynamics Simulations in Virtualized Clusters.
IEEE Trans. Serv. Comput., 2017
Hybrid TLB Coalescing: Improving TLB Translation Coverage under Diverse Fragmented Memory Allocations.
Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017
Proceedings of the 2017 Symposium on Cloud Computing, SoCC 2017, Santa Clara, CA, USA, 2017
Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017
2016
IEEE Trans. Serv. Comput., 2016
IEEE Trans. Parallel Distributed Syst., 2016
Reducing the Memory Bandwidth Overheads of Hardware Security Support for Multi-Core Processors.
IEEE Trans. Computers, 2016
Efficient Synonym Filtering and Scalable Delayed Translation for Hybrid Virtual Caching.
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016
Proceedings of the 2016 International Conference on Supercomputing, 2016
Proceedings of the IEEE International Conference on Consumer Electronics, 2016
Proceedings of the 34th IEEE International Conference on Computer Design, 2016
Interference Management for Distributed Parallel Applications in Consolidated Clusters.
Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems, 2016
2015
IEEE Trans. Computers, 2015
IEEE Trans. Computers, 2015
Proceedings of the 11th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, 2015
vCache: architectural support for transparent and isolated virtual LLCs in virtualized environments.
Proceedings of the 48th International Symposium on Microarchitecture, 2015
Big or Little: A Study of Mobile Interactive Applications on an Asymmetric Multi-core Platform.
Proceedings of the 2015 IEEE International Symposium on Workload Characterization, 2015
Proceedings of the 21st IEEE International Conference on Parallel and Distributed Systems, 2015
2014
IEEE Trans. Computers, 2014
IEEE Comput. Archit. Lett., 2014
Micro-Sliced Virtual Processors to Hide the Effect of Discontinuous CPU Availability for Consolidated Systems.
Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014
Proceedings of the ACM International Conference on Supercomputing 25th Anniversary Volume, 2014
2013
Revisiting Shared Cache Contention Problems: A Practical Hardware-Software Cooperative Approach.
IEICE Trans. Inf. Syst., 2013
2012
IEEE Trans. Computers, 2012
IEEE Trans. Computers, 2012
Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012
Proceedings of the 21st International Symposium on High-Performance Parallel and Distributed Computing, 2012
Proceedings of the 4th USENIX Workshop on Hot Topics in Cloud Computing, 2012
2011
Proceedings of the 2011 ACM Symposium on Applied Computing (SAC), TaiChung, Taiwan, March 21, 2011
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011
Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011
Proceedings of the IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W 2011), 2011
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011
2010
Proceedings of the Conference on High Performance Computing Networking, 2010
Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010
Proceedings of the Euro-Par 2010 Parallel Processing Workshops, 2010
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010
2009
Comput. Graph. Forum, 2009
Proceedings of the 17th Annual Meeting of the IEEE/ACM International Symposium on Modelling, 2009
2008
Cache bursts: A new approach for eliminating dead blocks and increasing cache efficiency.
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008
2007
IEEE Trans. Parallel Distributed Syst., 2007
2004
ACM Trans. Archit. Code Optim., 2004
Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, 2004
2003
IEEE Micro, 2003
2001
Proceedings of the 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), 2001