Jacques Sonzogni
According to our database1,
Jacques Sonzogni
authored at least 3 papers
between 2014 and 2015.
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Bibliography
2015
Dynamic current reduction of CMOS digital circuits through design and process optimization.
Proceedings of the 25th International Workshop on Power and Timing Modeling, 2015
Layout optimizations to decrease internal power and area in digital CMOS standard cells.
Proceedings of the 38th International Convention on Information and Communication Technology, 2015
2014
Dynamic power reduction through process and design optimizations on CMOS 80 nm embedded non-volatile memories technology.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014