Jacques J. A. Fournier

Orcid: 0000-0001-8185-892X

According to our database1, Jacques J. A. Fournier authored at least 53 papers between 2003 and 2023.

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Bibliography

2023
Protecting integrated circuits against side-channel and fault attacks with dynamic encoding.
Microprocess. Microsystems, March, 2023

2021
Under the Dome: Preventing Hardware Timing Information Leakage.
Proceedings of the Smart Card Research and Advanced Applications, 2021

2020
Improving side-channel attacks against pairing-based cryptography.
J. Cryptogr. Eng., 2020

Template Attacks against ECC: practical implementation against Curve25519.
Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020

Dynamic encoding, a lightweight combined countermeasure against hardware attacks.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2019
Practical Algebraic Side-Channel Attacks Against ACORN.
IACR Cryptol. ePrint Arch., 2019

Adaptive Masking: a Dynamic Trade-off between Energy Consumption and Hardware Security.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019

2018
Masking the Lightweight Authenticated Ciphers ACORN and Ascon in Software.
IACR Cryptol. ePrint Arch., 2018

SWARD: A Secure WAke-up RaDio against Denial-of-Service on IoT devices.
Proceedings of the 11th ACM Conference on Security & Privacy in Wireless and Mobile Networks, 2018

Thwarting Fault Attacks against Lightweight Cryptography using SIMD Instructions.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Binary Edwards Curves for Intrinsically Secure ECC Implementations for the IoT.
Proceedings of the 15th International Joint Conference on e-Business and Telecommunications, 2018

Energy-efficient Masking of the Trivium Stream Cipher.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Hardware Security Threats Against Bluetooth Mesh Networks.
Proceedings of the 2018 IEEE Conference on Communications and Network Security, 2018

Correlation-based imaging of fast moving objects using a sparse network of passive receivers.
Proceedings of the 52nd Asilomar Conference on Signals, Systems, and Computers, 2018

2017
An On-Chip Technique to Detect Hardware Trojans and Assist Counterfeit Identification.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Matched-Filter and Correlation-Based Imaging for Fast Moving Objects Using a Sparse Network of Receivers.
SIAM J. Imaging Sci., 2017

Thwarting Fault Attacks using the Internal Redundancy Countermeasure (IRC).
IACR Cryptol. ePrint Arch., 2017

DFA on LS-Designs with a Practical Implementation on SCREAM (extended version).
IACR Cryptol. ePrint Arch., 2017

A First DFA on PRIDE: from Theory to Practice (extended version).
IACR Cryptol. ePrint Arch., 2017

Bricklayer Attack: A Side-Channel Analysis on the ChaCha Quarter Round.
IACR Cryptol. ePrint Arch., 2017

First Practical Side-channel Attack to Defeat Point Randomization in Secure Implementations of Pairing-based Cryptography.
Proceedings of the 14th International Joint Conference on e-Business and Telecommunications (ICETE 2017), 2017

Resistance of the Point Randomisation Countermeasure for Pairings Against Side-Channel Attack.
Proceedings of the E-Business and Telecommunications - 14th International Joint Conference, 2017

DFA on LS-Designs with a Practical Implementation on SCREAM.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2017

2016
Granularity and detection capability of an adaptive embedded Hardware Trojan detection system.
Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016

On-chip fingerprinting of IC topology for integrity verification.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

A First DFA on PRIDE: From Theory to Practice.
Proceedings of the Risks and Security of Internet and Systems, 2016

New Partitioning Approach for Hardware Trojan Detection Using Side-Channel Measurements.
Proceedings of the Applied Reconfigurable Computing - 12th International Symposium, 2016

2015
Combining Image Processing and Laser Fault Injections for Characterizing a Hardware AES.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Extraction of intrinsic structure for Hardware Trojan detection.
IACR Cryptol. ePrint Arch., 2015

Inverting the Final exponentiation of Tate pairings on ordinary elliptic curves using faults.
IACR Cryptol. ePrint Arch., 2015

A survey of fault attacks in pairing based cryptography.
Cryptogr. Commun., 2015

Thoroughly analyzing the use of ring oscillators for on-chip hardware trojan detection.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

SEMBA: A SEM based acquisition technique for fast invasive Hardware Trojan detection.
Proceedings of the European Conference on Circuit Theory and Design, 2015

A high efficiency hardware trojan detection technique based on fast SEM imaging.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
Increasing the efficiency of laser fault injections using fast gate level reverse engineering.
Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014

Practical Validation of Several Fault Attacks against the Miller Algorithm.
Proceedings of the 2014 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2014

Adjusting Laser Injections for Fully Controlled Faults.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2014

2013
Practical measurements of data path delays for IP authentication & integrity verification.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013

2012
A DFA on AES Based on the Entropy of Error Distributions.
Proceedings of the 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2012

EM Probes Characterisation for Security Analysis.
Proceedings of the Cryptography and Security: From Theory to Applications, 2012

2011
Design and characterisation of an AES chip embedding countermeasures.
Int. J. Intell. Eng. Informatics, 2011

ElectroMagnetic analysis (EMA) of software AES on Java mobile phones.
Proceedings of the 2011 IEEE International Workshop on Information Forensics and Security, 2011

A side-channel and fault-attack resistant AES circuit working on duplicated complemented values.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
Memory Address Scrambling Revealed Using Fault Attacks.
Proceedings of the 2010 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2010

2008
Pelvic motion measurement during over ground walking, analysis and implementation on the WalkTrainer reeducation device.
Proceedings of the 2008 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2008

2007
Vector microprocessors for cryptography.
PhD thesis, 2007

Pelvic motion implementation on the WalkTrainer.
Proceedings of the IEEE International Conference on Robotics and Biomimetics, 2007

2006
Hardware-Software Codesign of a Vector Co-processor for Public Key Cryptography.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Implementing Cryptography on TFT Technology for Secure Display Applications.
Proceedings of the Smart Card Research and Advanced Applications, 2006

Cache Based Power Analysis Attacks on AES.
Proceedings of the Information Security and Privacy, 11th Australasian Conference, 2006

2005
A Vector Approach to Cryptography Implementation.
Proceedings of the Digital Rights Management: Technologies, 2005

2003
Balanced self-checking asynchronous logic for smart card applications.
Microprocess. Microsystems, 2003

Security Evaluation of Asynchronous Circuits.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2003


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