Jack Whitham

According to our database1, Jack Whitham authored at least 18 papers between 2006 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2014
Explicit reservation of cache memory in a predictable, preemptive multitasking real-time system.
ACM Trans. Embed. Comput. Syst., 2014

WCET-Based Comparison of an Instruction Scratchpad and a Method Cache.
Proceedings of the 17th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2014

2013
Blueshell: a platform for rapid prototyping of multiprocessor NoCs and accelerators.
SIGARCH Comput. Archit. News, 2013

2012
Investigation of Scratchpad Memory for Preemptive Multitasking.
Proceedings of the 33rd IEEE Real-Time Systems Symposium, 2012

Explicit Reservation of Local Memory in a Predictable, Preemptive Multitasking Real-Time System.
Proceedings of the 2012 IEEE 18th Real Time and Embedded Technology and Applications Symposium, 2012

Optimal Program Partitioning for Predictable Performance.
Proceedings of the 24th Euromicro Conference on Real-Time Systems, 2012

2010
Time-Predictable Out-of-Order Execution for Hard Real-Time Systems.
IEEE Trans. Computers, 2010

Studying the Applicability of the Scratchpad Memory Management Unit.
Proceedings of the 16th IEEE Real-Time and Embedded Technology and Applications Symposium, 2010

Investigating Average versus Worst-Case Timing Behavior of Data Caches and Data Scratchpads.
Proceedings of the 22nd Euromicro Conference on Real-Time Systems, 2010

2009
Using hardware methods to improve time-predictable performance in real-time Java systems.
Proceedings of the 7th International Workshop on Java Technologies for Real-Time and Embedded Systems, 2009

Implementing time-predictable load and store operations.
Proceedings of the 9th ACM & IEEE International conference on Embedded software, 2009

2008
Real-time processor architectures for worst case execution time reduction.
PhD thesis, 2008

Traces as a Solution to Pessimism and Modeling Costs in WCET Analysis.
Proceedings of the 8th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, 2008

Predictable Out-of-Order Execution Using Virtual Traces.
Proceedings of the 29th IEEE Real-Time Systems Symposium, 2008

Forming Virtual Traces for WCET Analysis and Reduction.
Proceedings of the Fourteenth IEEE Internationl Conference on Embedded and Real-Time Computing Systems and Applications, 2008

Using Trace Scratchpads to Reduce Execution Times in Predictable Real-Time Architectures.
Proceedings of the 14th IEEE Real-Time and Embedded Technology and Applications Symposium, 2008

2006
MCGREP - A Predictable Architecture for Embedded Real-Time Systems.
Proceedings of the 27th IEEE Real-Time Systems Symposium (RTSS 2006), 2006

Integrating Custom Instruction Specifications into C Development Processes.
Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006


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