Jacinto Garcia Martinez

According to our database, Jacinto Garcia Martinez authored at least 3 papers between 2016 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

A Low-Power Microcontroller in a 40-nm CMOS Using Charge Recycling.

Kristof Blutman, Ajay Kapoor, Arjun Majumdar, Jacinto Garcia Martinez, Juan Diego Echeverri, Leo Sevat, Arnoud P. van der Wel, Hamed Fatemi, Kofi A. A. Makinwa, José Pineda de Gyvez

IEEE J. Solid State Circuits, 2017

2016

A microcontroller with 96% power-conversion efficiency using stacked voltage domains.

Kristof Blutman, Ajay Kapoor, Arjun Majumdar, Jacinto Garcia Martinez, Juan Diego Echeverri, Leo Sevat, Arnoud P. van der Wel, Hamed Fatemi, José Pineda de Gyvez, Kofi A. A. Makinwa

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

Lower power by voltage stacking: a fine-grained system design approach.

Kristof Blutman, Ajay Kapoor, Jacinto Garcia Martinez, Hamed Fatemi, José Pineda de Gyvez

Proceedings of the 53rd Annual Design Automation Conference, 2016