Ja-Hum Ku

According to our database1, Ja-Hum Ku authored at least 5 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2024
14nm FinFET Node Embedded MRAM Technology for Automotive Non-Volatile RAM Applications with Endurance Over 1E12-Cycles.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

Product Performance Aware 3<sup>rd</sup> Generation GAA Platform Transistor Design with Extreme Small Local Layout Effect and Transistor Variation.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023
Highly Reliable/Manufacturable 4nm FinFET Platform Technology (SF4X) for HPC Application with Dual-CPP/HP-HD Standard Cells.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

World's First GAA 3nm Foundry platform Technology (SF3) with Novel Multi-Bridge-Channel-FET (MBCFET™) Process.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2016
17.1 A 10nm FinFET 128Mb SRAM with assist adjustment system for power, performance, and area optimization.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016


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