J. Shin

According to our database1, J. Shin authored at least 6 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Demonstration of Logic-Block Performance-Power Gain by 1st Generation Back Side Power Delivery Network for SoC and HPC Applications Beyond 2nm Node.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

Amorphous Oxide Semiconductors for Monolithic 3D Integrated Circuits.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2018
Reliability of dual-damascene local interconnects featuring cobalt on 10 nm logic technology.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

2013
From Local to Global Stability in Stochastic Processing Networks Through Quadratic Lyapunov Functions.
Math. Oper. Res., 2013

2011
A Quad-Band GSM/GPRS/EDGE SoC in 65 nm CMOS.
IEEE J. Solid State Circuits, 2011

2007
Modified Dynamic Time Warping for Stroke-Based On-line Signature Verification.
Proceedings of the 9th International Conference on Document Analysis and Recognition (ICDAR 2007), 2007


  Loading...