J. Raja Paul Perinbam

According to our database, J. Raja Paul Perinbam authored at least 15 papers between 2005 and 2022.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2022

Visualization of occipital lobe and zygomatic arch of brain region through non-linear perspective projection using DCO algorithm.

R. Partheepan, J. Raja Paul Perinbam, M. Krishnamurthy, N. R. Shanker, S. Krishna Kumari, B. Chinthamani

Soft Comput., 2022

Visualization of dentate nucleus, pontine tegmentum, pontine nuclei from CT image via nonlinear perspective projection.

R. Partheepan, J. Raja Paul Perinbam, M. Krishnamurthy, N. R. Shanker

Signal Image Video Process., 2022

2021

Visualization of Pterygomaxillary Fissure Structure and Shape in CT Image via Non-Linear Perspective Projection.

R. Partheepan, J. Raja Paul Perinbam, M. Krishnamurthy, N. R. Shanker

J. Medical Imaging Health Informatics, 2021

2020

Watermark Visibility Adjustable RVW Scheme for JPEG Images.

D. R. Denslin Brabin, J. Raja Paul Perinbam, D. Meganathan

Wirel. Pers. Commun., 2020

2017

A Block Based Reversible Data Hiding Scheme for Digital Images Using Optimal Value Computation.

D. R. Denslin Brabin, J. Raja Paul Perinbam, D. Meganathan

Wirel. Pers. Commun., 2017

2014

Enhancement of test data compression with multistage encoding.

S. Sivanantham, M. Padmavathy, Ganga Gopakumar, Partha Sharathi Mallick, J. Raja Paul Perinbam

Integr., 2014

Low-power selective pattern compression for scan-based test applications.

S. Sivanantham, Partha Sharathi Mallick, J. Raja Paul Perinbam

Comput. Electr. Eng., 2014

2012

CSP-Filling: A New X-Filling Technique to Reduce Capture and Shift Power in Test Applications.

S. Sivanantham, K. Sarathkumar, Jincy P. Manuel, Partha Sharathi Mallick, J. Raja Paul Perinbam

Proceedings of the International Symposium on Electronic System Design, 2012

2009

High speed, low power 100 MS/s front end track-and-hold amplifier for ten-bit pipelined ADC.

D. Meganathan, J. Raja Paul Perinbam, R. Deepalakshmi

Int. J. High Perform. Syst. Archit., 2009

2008

FPGA Implementation of Integer Transform and Quantizer for H.264 Encoder.

Reeba Korah, J. Raja Paul Perinbam

J. Signal Process. Syst., 2008

Fully Pipelined Parallel Architecture for Candidate Block and Pixel-Subsampling-Based Motion Estimation.

Reeba Korah, J. Raja Paul Perinbam

VLSI Design, 2008

A 52.6 mW 10-bit, 100 MS/s Pipelined CMOS Analog-To-Digital Converter.

D. Meganathan, S. Moorthi, Amrith Sukumaran, M. M. Dinesh Babu, J. Raja Paul Perinbam

J. Low Power Electron., 2008

2007

Evolving virtual reconfigurable circuit for a fault tolerant system.

P. Nirmal Kumar, S. Anandhi, J. Raja Paul Perinbam

Proceedings of the IEEE Congress on Evolutionary Computation, 2007

2005

A Novel Low Power 16X16 Content Addressable Memory Using PA.

G. Josemin Bala, J. Raja Paul Perinbam

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Digital Image Filter Design Using Evolvable Hardware.

P. Nirmal Kumar, S. Suresh, J. Raja Paul Perinbam

Proceedings of the 4th Annual ACIS International Conference on Computer and Information Science (ICIS 2005), 2005