J. Nakai
According to our database1,
J. Nakai
authored at least 2 papers
between 2009 and 2012.
Collaborative distances:
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Bibliography
2012
A 19nm 112.8mm<sup>2</sup> 64Gb multi-level flash memory with 400Mb/s/pin 1.8V Toggle Mode interface.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009