J. G. Wu

According to our database, J. G. Wu authored at least 2 papers between 2012 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2013

A 2Mb ReRAM with two bits error correction codes circuit for high reliability application.

Jianguo Yang, Ying Meng, Xiaoyong Xue, Ryan Huang, Q. T. Zhou, J. G. Wu, Yinyin Lin

Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012

A 0.13µm 8Mb logic based CuxSiyO resistive memory with self-adaptive yield enhancement and operation power reduction.

Xiaoyong Xue, W. X. Jian, Jianguo Yang, F. J. Xiao, G. Chen, X. L. Xu, Y. F. Xie, Yinyin Lin, R. Huang, Q. T. Zhou, J. G. Wu

Proceedings of the Symposium on VLSI Circuits, 2012