Ivan S. Kourtev
According to our database1,
Ivan S. Kourtev
authored at least 24 papers
between 1999 and 2009.
Collaborative distances:
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Bibliography
2009
J. Circuits Syst. Comput., 2009
2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Technology mapping for Field Programmable Gate Arrays using Content-Addressable Memory (CAM).
Microprocess. Microsystems, 2006
Technology Mapping for Field Programmable Gate Arrays using Content-Addressable Memory (CAM).
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006
2004
Linearization of the timing analysis and optimization of level-sensitive digital synchronous circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2004
IEEE Trans. Very Large Scale Integr. Syst., 2004
Time borrowing and clock skew scheduling effects on multi-phase level-sensitive circuits.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Performance metrics for asynchronous digital circuits applicable to computer-aided design.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004
2003
Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003
Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003
Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003
2002
Demonstration of Speed and Power Enhancements on an Industrial Circuit Through Application of Clock Skew Scheduling.
J. Circuits Syst. Comput., 2002
Performance optimization of single-phase level-sensitive circuits using time borrowing and non-zero clock skew.
Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, 2002
Large scale clock skew scheduling techniques for improved reliability of digital synchronous VLSI circuits.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2001
Demonstration of speed enhancements on an industrial circuit through application of non-zero clock skew scheduling.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
1999
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999