Ivan Fabiano

According to our database1, Ivan Fabiano authored at least 7 papers between 2013 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

2014
2016
2018
2020
2022
2024
0
1
2
3
1
1
2
1
2

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
A 5nm 60GS/s 7b 64-Way Time Interleaved Partial Loop Unrolled SAR ADC Achieving 34dB SNDR up to 32GHz.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

A 800Gb/s Transceiver for PAM-4 Optical Direct-Detection Applications in 5nm FinFet Process.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2019

2017
A SAW-Less 2.4-GHz Receiver Front-End With 2.4-mA Battery Current for SoC Coexistence.
IEEE J. Solid State Circuits, 2017

2015
A 2.4GHz low-power SAW-less receiver for SoC coexistence.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

A 1.7-2.1GHz +23dBm TX power compatible blocker tolerant FDD receiver with integrated duplexer in 28nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2013
SAW-Less Analog Front-End Receivers for TDD and FDD.
IEEE J. Solid State Circuits, 2013


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