Itaru Kurosawa

According to our database, Itaru Kurosawa authored at least 4 papers between 1989 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2007

Special Section on Innovative Superconducting Devices and Their Applications.

Itaru Kurosawa

IEICE Trans. Electron., 2007

1996

Pulse-driven dual-rail logic gate family based on rapid single-flux-quantum (RSFQ) devices for asynchronous circuits.

Masaaki Maezawa, Itaru Kurosawa, Yoshio Kameda, Takashi Nanya

Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '96), 1996

1989

A Josephson 4 bit RALU for a prototype computer.

Hiroshi Nakagawa, Shin Kosaka, Hiroki Kawamura, Itaru Kurosawa, Masahiro Aoyagi, Youichi Hamazaki, Yoshikuni Okada, Susumu Takada

IEEE J. Solid State Circuits, August, 1989

A 1 kbit Josephson random access memory using variable threshold cells.

Itaru Kurosawa, Hiroshi Nakagawa, Shin Kosaka, Masahiro Aoyagi, Susumu Takada

IEEE J. Solid State Circuits, August, 1989