Ismail Emir Yuksel
Orcid: 0000-0003-3310-4423
According to our database1,
Ismail Emir Yuksel
authored at least 15 papers
between 2020 and 2024.
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Bibliography
2024
Leveraging Adversarial Detection to Enable Scalable and Low Overhead RowHammer Mitigations.
CoRR, 2024
Amplifying Main Memory-Based Timing Covert and Side Channels using Processing-in-Memory Operations.
CoRR, 2024
ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation.
Proceedings of the 33rd USENIX Security Symposium, 2024
BreakHammer: Enhancing RowHammer Mitigations by Carefully Throttling Suspect Threads.
Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024
Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024
Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024
Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis.
Proceedings of the 54th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2024
An Experimental Characterization of Combined RowHammer and RowPress Read Disturbance in Modern DRAM Chips.
Proceedings of the 54th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2024
2023
PULSAR: Simultaneous Many-Row Activation for Reliable and High-Performance Computing in Off-the-Shelf DRAM Chips.
CoRR, 2023
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
CoRR, 2022
2021
2020
Demonstrating Reduced-Voltage FPGA-Based Neural Network Acceleration for Power-Efficiency.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020
An Experimental Study of Reduced-Voltage Operation in Modern FPGAs for Neural Network Acceleration.
Proceedings of the 50th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2020