Ismail Bustany
Orcid: 0000-0002-7099-1546
According to our database1,
Ismail Bustany
authored at least 28 papers
between 2004 and 2024.
Collaborative distances:
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Bibliography
2024
K-SpecPart: Supervised Embedding Algorithms and Cut Overlay for Improved Hypergraph Partitioning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2024
Applying reinforcement learning to learn best net to rip and re-route in global routing.
ACM Trans. Design Autom. Electr. Syst., 2024
Proceedings of the 2024 International Symposium on Physical Design, 2024
2023
Entropy Maximization in Sparse Matrix by Vector Multiplication (max<sub>E</sub>SpMV).
CoRR, 2023
K-SpecPart: A Supervised Spectral Framework for Multi-Way Hypergraph Partitioning Solution Improvement.
CoRR, 2023
Proceedings of the 5th ACM/IEEE Workshop on Machine Learning for CAD, 2023
An Open-Source Constraints-Driven General Partitioning Multi-Tool for VLSI Physical Design.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
RL-Ripper: : A Framework for Global Routing Using Reinforcement Learning and Smart Net Ripping Techniques.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
2022
A Machine Learning Approach for Accelerating SimPL-Based Global Placement for FPGA's.
Proceedings of the 24th ACM/IEEE Workshop on System Level Interconnect Pathfinding, 2022
Proceedings of the 24th ACM/IEEE Workshop on System Level Interconnect Pathfinding, 2022
SpecPart: A Supervised Spectral Framework for Hypergraph Partitioning Solution Improvement.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
2021
Proceedings of the ISPD '21: International Symposium on Physical Design, 2021
2020
Eh?Predictor: A Deep Learning Framework to Identify Detailed Routing Short Violations From a Placed Netlist.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
From Tuning to Learning: Why the FPGA Physical Design Flow Offers a Compelling Case for ML?
Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020
2019
Proceedings of the 2019 International Symposium on Physical Design, 2019
2018
Eh?Legalizer: A High Performance Standard-Cell Legalizer Observing Technology Constraints.
ACM Trans. Design Autom. Electr. Syst., 2018
NTUplace4dr: A Detailed-Routing-Driven Placer for Mixed-Size Circuit Designs With Technology and Region Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
A machine learning framework to identify detailed routing short violations from a placed netlist.
Proceedings of the 55th Annual Design Automation Conference, 2018
2017
A Fast, Robust Network Flow-based Standard-Cell Legalization Method for Minimizing Maximum Movement.
Proceedings of the 2017 ACM on International Symposium on Physical Design, 2017
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
2016
Method of Outer Approximations and Adaptive Approximations for a Class of Matrix Games.
J. Optim. Theory Appl., 2016
2015
POLAR: A High Performance Mixed-Size Wirelengh-Driven Placer With Density Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Proceedings of the 2015 IEEE International Conference on Microelectronics Systems Education, 2015
ISPD 2015 Benchmarks with Fence Regions and Routing Blockages for Detailed-Routing-Driven Placement.
Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015
2014
ISPD 2014 benchmarks with sub-45nm technology rules for detailed-routing-driven placement.
Proceedings of the International Symposium on Physical Design, 2014
2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Proceedings of the American Control Conference, 2013
2004
Proceedings of the Applied Parallel Computing, 2004