Islam A. K. M. Mahfuzul
Orcid: 0000-0002-5011-4044Affiliations:
- Kyoto University, Department of Electrical Engineering, Graduate School of Engineering, Japan
According to our database1,
Islam A. K. M. Mahfuzul
authored at least 30 papers
between 2012 and 2024.
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Bibliography
2024
Design of Reference-free Flash ADC With On-chip Rank-based Comparator Selection Using Multiple Comparator Groups.
IPSJ Trans. Syst. LSI Des. Methodol., 2024
2023
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
An Adaptive-Sampling Digital LDO with Statistical Comparator Selection Achieving 99.99% Maximum Current Efficiency and 0.25ps FoM in 65nm.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
A Fully Synchronous Digital LDO with Built-in Adaptive Frequency Modulation and Implicit Dead-Zone Control.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
2022
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., November, 2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
Performance Improvement of Order Statistics Based Flash ADC Using Multiple Comparator Groups.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
2021
Flash ADC Utilizing Offset Voltage Variation With Order Statistics Based Comparator Selection.
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021
CDF Distance Based Statistical Parameter Extraction Using Nonlinear Delay Variation Models.
Proceedings of the 27th IEEE International Symposium on On-Line Testing and Robust System Design, 2021
A process scalable voltage-reference-free temperature sensor utilizing MOSFET threshold voltage variation.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2019
An 11-nW CMOS Temperature-to-Digital Converter Utilizing Sub-Threshold Current at Sub-Thermal Drain Voltage.
IEEE J. Solid State Circuits, 2019
IPSJ Trans. Syst. LSI Des. Methodol., 2019
Proceedings of the 20th International Symposium on Quality Electronic Design, 2019
Analysis of Random Telegraph Noise (RTN) at Near-Threshold Operation by Measuring 154k Ring Oscillators.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
CNN-based Approach for Estimating Degradation of Power Devices by Gate Waveform Monitoring.
Proceedings of the International Conference on IC Design and Technology, 2019
2018
Feature Extraction, Performance Analysis and System Design Using the DU Mobility Dataset.
IEEE Access, 2018
Worst-Case Performance Analysis Under Random Telegraph Noise Induced Threshold Voltage Variability.
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018
PVT<sup>2</sup>: process, voltage, temperature and time-dependent variability in scaled CMOS process.
Proceedings of the International Conference on Computer-Aided Design, 2018
A 13nW temperature-to-digital converter utilizing sub-threshold MOSFET operation at sub-thermal drain voltage.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
2017
Programmable Neuron Array Based on a 2-Transistor Multiplier Using Organic Floating-Gate for Intelligent Sensors.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2017
Effect of supply voltage on random telegraph noise of transistors under switching condition.
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017
2016
On-chip monitoring and compensation scheme with fine-grain body biasing for robust and energy-efficient operations.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
2015
Wide-Supply-Range All-Digital Leakage Variation Sensor for On-Chip Process and Temperature Monitoring.
IEEE J. Solid State Circuits, 2015
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015
2014
Modeling, Characterization and Compensation of Performance Variability using On-chip Monitor Circuits for Energy-efficient LSI.
PhD thesis, 2014
Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014
A body bias generator with wide supply-range down to threshold voltage for within-die variability compensation.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014
2013
On-Chip Detection of Process Shift and Process Spread for Post-Silicon Diagnosis and Model-Hardware Correlation.
IEICE Trans. Inf. Syst., 2013
2012
On-Chip Detection of Process Shift and Process Spread for Silicon Debugging and Model-Hardware Correlation.
Proceedings of the 21st IEEE Asian Test Symposium, 2012