Isao Naritake

According to our database1, Isao Naritake authored at least 2 papers between 1995 and 2000.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2000
A 12-ns 8-Mbyte DRAM secondary cache for a 64-bit microprocessor.
IEEE J. Solid State Circuits, 2000

1995
A 1-Gb DRAM for file applications.
IEEE J. Solid State Circuits, November, 1995


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