Irma Esmer Papazian

According to our database, Irma Esmer Papazian authored at least 3 papers between 2014 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2020

New 3rd Gen Intel^® Xeon^® Scalable Processor (Codename: Ice Lake-SP).

Irma Esmer Papazian

Proceedings of the IEEE Hot Chips 32 Symposium, 2020

2015

Ivy Bridge Server: A Converged Design.

Irma Esmer Papazian, Sailesh Kottapalli, Jeff Baxter, Jeff Chamberlain, Geetha Vedaraman, Brian Morris

IEEE Micro, 2015

2014

Ivybridge server architecture: A converged server.

Irma Esmer Papazian, Sailesh Kottapalli

Proceedings of the 2014 IEEE Hot Chips 26 Symposium (HCS), 2014