Irina V. Hahanova

According to our database1, Irina V. Hahanova authored at least 14 papers between 2003 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2023
Modeling Faults as Addresses.
Proceedings of the IEEE East-West Design & Test Symposium, 2023

2021
Cyber Social FML - Computing I. Goal and Main Trends.
Proceedings of the IEEE East-West Design & Test Symposium, 2021

2019
Qubit Fault Detection in SoC Logic.
Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019

2018
Quantum Deductive Simulation for Logic Functions.
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018

2017
Quantum sequencer for the minimal test synthesis of black-box functionality.
Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017

2014
Quantum Models and Method for Analysis and Testing Computing Systems.
Proceedings of the 11th International Conference on Information Technology: New Generations, 2014

Qubit modeling digital systems.
Proceedings of the 2014 East-West Design & Test Symposium, 2014

2013
Transaction level model of embedded processor for vector-logical analysis.
Proceedings of the East-West Design & Test Symposium, 2013

Quantum models for description of digital systems.
Proceedings of the East-West Design & Test Symposium, 2013

Quantum technology for analysis and testing computing systems.
Proceedings of the East-West Design & Test Symposium, 2013

Models for SoC infrastructure of radio frequency identification with code-division multiple.
Proceedings of the East-West Design & Test Symposium, 2013

2010
Testing and verification of HDL-models for SoC components.
Proceedings of the 2010 East-West Design & Test Symposium, 2010

2004
Topological BDP Fault Simulation Method.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

2003
High Performance Fault simulation for Digital Systems.
Int. J. Comput., 2003


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