Ippei Tate

According to our database, Ippei Tate authored at least 3 papers between 2006 and 2007.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2007

Toward Parallel and Distributed Processing on High-Density Network with Mobile Devices.

Satoshi Watanabe, Yoshiyasu Ogasawara, Ippei Tate, Hirofumi Yano, Hironori Nakajo

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2007

2006

A Model of Implementable SMT Processor on FPGA.

Ippei Tate, Yoshiyasu Ogasawara, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Kazunari Asano, Satoshi Watanabe, Mitaro Namiki, Hironori Nakajo

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications & Conference on Real-Time Computing Systems and Applications, 2006

Towards Reconfigurable Cache Memory for a Multithreaded Processor.

Yoshiyasu Ogasawara, Ippei Tate, Satoshi Watanabe, Mikiko Sato, Koichi Sasada, Kaname Uchikura, Kazunari Asano, Mitaro Namiki, Hironori Nakajo

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications & Conference on Real-Time Computing Systems and Applications, 2006