Iouliia Skliarova

Lecture Notes in Electrical Engineering 566, Springer, ISBN: 978-3-030-20720-5, 2019

2017

Data processing in the firmware systems for logic control based on search networks.

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[DOI]

Autom. Remote. Control., 2017

RAM-based mergers for data sort and frequent item computation.

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[DOI]

Proceedings of the 40th International Convention on Information and Communication Technology, 2017

Reconfigurable systems in engineering education: Best practices and future trends.

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[DOI]

Proceedings of the 2017 IEEE Global Engineering Education Conference, 2017

2016

On-Chip Reconfigurable Hardware Accelerators for Popcount Computations.

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[DOI]

Int. J. Reconfigurable Comput., 2016

Computing Sorted Subsets for Data Processing in Communicating Software/Hardware Control Systems.

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[DOI]

Int. J. Comput. Commun. Control, 2016

2015

Multi-core DSP-based Vector Set Bits Counters/Comparators.

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[DOI]

J. Signal Process. Syst., 2015

Comparison of On-chip Communications in Zynq-7000 All Programmable Systems-on-Chip.

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[DOI]

IEEE Embed. Syst. Lett., 2015

Design and implementation of counting networks.

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[DOI]

Computing, 2015

Integration of high-level synthesis to the courses on reconfigurable digital systems.

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[DOI]

Proceedings of the 38th International Convention on Information and Communication Technology, 2015

FPGA-based time and cost effective Hamming weight comparators for binary vectors.

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[DOI]

Proceedings of the IEEE EUROCON 2015, 2015

Analysis and Comparison of Attainable Hardware Acceleration in All Programmable Systems-on-Chip.

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[DOI]

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

2014

FPGA-based Accelerators for Parallel Data Sort.

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[DOI]

Appl. Comput. Syst., 2014

High-performance implementation of regular and easily scalable sorting networks on an FPGA.

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[DOI]

Microprocess. Microsystems, 2014

Teaching FPGA-based systems.

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[DOI]

Proceedings of the 2014 IEEE Global Engineering Education Conference, 2014

Design space exploration in multi-level computing systems.

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[DOI]

Proceedings of the 15th International Conference on Computer Systems and Technologies, 2014

2013

Hardware implementations of software programs based on hierarchical finite state machine models.

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[DOI]

Comput. Electr. Eng., 2013

Implementation of parallel operations over streams in extensible processing platforms.

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[DOI]

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Implementation of address-based data sorting on different FPGA platforms.

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[DOI]

Proceedings of the East-West Design & Test Symposium, 2013

Address-based data processing over N-ary trees.

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[DOI]

Proceedings of Eurocon 2013, 2013

Optimization of address-based data sorting unit with external memory support.

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[DOI]

Proceedings of the Computer Systems and Technologies, 2013

2012

Performance evaluation for FPGA-based processing of tree-like structures.

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[DOI]

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Methodology and international collaboration in teaching reconfigurable systems.

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[DOI]

Proceedings of the IEEE Global Engineering Education Conference, 2012

2011

Implementation in FPGA of Address-Based Data Sorting.

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[DOI]

Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

High-performance hardware accelerators for sorting and managing priorities.

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[DOI]

Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

Recursion and hierarchy in digital design and prototyping: a case study.

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[DOI]

Proceedings of the 12th International Conference on Computer Systems and Technologies, 2011

2010

Synthesis and Implementation of Hierarchical Finite State Machines with Implicit Modules.

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[DOI]

Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

Parallel FPGA-Based Implementation of Recursive Sorting Algorithms.

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[DOI]

Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

Reconfigurable Digital Audio Mixer for Electroacoustic Music.

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[DOI]

David Pedrosa Branco

José Vieira

Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

Application-specific hardware accelerator for implementing recursive sorting algorithms.

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[DOI]

Proceedings of the International Conference on Field-Programmable Technology, 2010

2009

Recursion in reconfigurable computing: A survey of implementation approaches.

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[DOI]

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008

Multimedia Tools and Architectures for Hardware/Software Co-Simulation of Reconfigurable Systems.

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[DOI]

Manuel Almeida

Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

Recursive versus Iterative Algorithms for Solving Combinatorial Search Problems in Hardware.

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[DOI]

Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

2007

A prototyping system for mobile devices.

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[DOI]

Manuel Almeida

Proceedings of the International Conference on Wireless Communications and Mobile Computing, 2007

Reuse Technique in Hardware Design.

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[DOI]

Proceedings of the IEEE International Conference on Information Reuse and Integration, 2007

Encoding Algorithms for Logic Synthesis.

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[DOI]

Proceedings of the 2007 IEEE/ACS International Conference on Computer Systems and Applications (AICCSA 2007), 2007

Software/Configware Implementation of Combinatorial Algorithms.

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[DOI]

Proceedings of the 2007 IEEE/ACS International Conference on Computer Systems and Applications (AICCSA 2007), 2007

2006

Multimedia Tools for Teaching Reconfigurable Systems.

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Proceedings of the MoMM'2006, 2006

Reconfigurable Systems and their Influence on Mobile and Multimedia Applications.

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Proceedings of the MoMM'2006, 2006

E-learning Tools and Web-resources for Teaching Reconfigurable Systems.

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[DOI]

Proceedings of the Education for the 21st Century, 2006

Recursive and Iterative Algorithms for N-ary Search Problems.

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[DOI]

Proceedings of the Toward Category-Level Object Recognition, 2006

Evolutionary Algorithm for State Encoding.

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[DOI]

Proceedings of the Artificial Intelligence in Theory and Practice, 2006

Intelligent Systems Engineering with Reconfigurable Computing.

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[DOI]

Proceedings of the Toward Category-Level Object Recognition, 2006

2005

Teaching reconfigurable systems: methods, tools, tutorials, and projects.

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[DOI]

IEEE Trans. Educ., 2005

Self-correction of FPGA-Based Control Units.

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[DOI]

Proceedings of the Embedded Software and Systems, Second International Conference, 2005

FPGA-based implementation and comparison of recursive and iterative algorithms.

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[DOI]

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2004

A software/reconfigurable hardware SAT solver.

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[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2004

Reconfigurable Hardware SAT Solvers: A Survey of Systems.

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[DOI]

IEEE Trans. Computers, 2004

Hardware/Software Implementation of FPGA-Targeted Matrix-Oriented SAT Solvers.

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[DOI]

Joel Arrais

Proceedings of the Field Programmable Logic and Application, 2004

2003

The design and implementation of a reconfigurable processor for problems of combinatorial computation.

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[DOI]

J. Syst. Archit., 2003

High-Level Design Tools for FPGA-Based Combinatorial Accelerators.

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[DOI]

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Reconfigurable Systems in Education.

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[DOI]

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Architecture of a Reconfigurable Processor for Implementing Search Algorithm over Discrete Matrices.

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Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003

A Dynamically Reconfigurable Accelerator for Operations over Boolean and Ternary Vectors.

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[DOI]

Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003

Design Tools and Reusable Libraries for FPGA-Based Digital Circuits.

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[DOI]

Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003

Design of Digital Circuits on the Basis of Hardware Templates.

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Proceedings of the International Conference on Embedded Systems and Applications, 2003

2002

FPGA-Based Implementation of Genetic Algorithm for the Traveling Salesman Problem and Its Industrial Application.

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[DOI]

Proceedings of the Developments in Applied Artificial Intelligence, 2002

A SAT Solver Using Software and Reconfigurable Hardware.

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[DOI]

Proceedings of the 2002 Design, 2002

2001

Design and Implementation of Reconfigurable Processor for Problems of Combinatorial Computations.

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[DOI]

Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001

2000

Exploiting FPGA-Based Architectures and Design Tools for Problems of Reconfigurable Computations.

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[DOI]

Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000

1999

FPGA-Targeted Development System for Embedded Applications.

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[DOI]

José A. Fonseca

Ricardo Sal Monteiro

Andreia Melo

Nuno Lau

Konstantin Kondratjuk

Paulo A. C. S. Neves

Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field Programmable Gate Arrays, 1999

Development System for FPGA-Based Digital Circuits.

[BibT_eX]

[DOI]

José A. Fonseca

Ricardo Sal Monteiro

Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999

1998

Synthesis Tools and Design Environment for Dynamically Reconfigurable FPGAs.

[BibT_eX]

[DOI]

Nuno Lau

Andreia Melo

Konstantin Kondratjuk

Ricardo Sal Monteiro