Ioannis Vourkas

Orcid: 0000-0002-7036-8092

According to our database1, Ioannis Vourkas authored at least 58 papers between 2009 and 2024.

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Bibliography

2024
A Star Network of Bipolar Memristive Devices Enables Sensing and Temporal Computing.
Sensors, January, 2024

2023
Effective Current-Driven Memory Operations for Low-Power ReRAM Applications.
IEEE Access, 2023

RevI-Ve: A Comprehensive Software Interface for Easy ReRAM Device Characterization.
Proceedings of the 12th International Conference on Modern Circuits and Systems Technologies, 2023

HW Implementation of Cellular Automata Models Supporting AgriFood Quality Control Processes.
Proceedings of the 12th International Conference on Modern Circuits and Systems Technologies, 2023

Compact Time-Based Sensor-to-Digital Converters in Skywater 130nm Open-Source Technology.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

On the Development of Prognostics and System Health Management (PHM) Techniques for ReRAM Applications.
Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023

Using Current to Drive Two SDC Memristors Connected in Series and in Anti-Series.
Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023

2022
Reliability-Aware Ratioed Logic Operations for Energy-Efficient Computational ReRAM.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

On the Design and Development of a ReRAM-based Computational Memory Prototype.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

A Circuit-Level SPICE Modeling Strategy for the Simulation of Behavioral Variability in ReRAM.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

Exploring Different Circuit-level Approaches to the Forming of Resistive Random Access Memories.
Proceedings of the 11th International Conference on Modern Circuits and Systems Technologies, 2022

Design and Simulation of Peripheral Driving Circuitry for Computational ReRAM.
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

2021
Design Steps towards a MCU-based Instrumentation System for Memristor-based Crossbar Arrays.
Proceedings of the 10th International Conference on Modern Circuits and Systems Technologies, 2021

Design Considerations for the Development of Computational Resistive Memories.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

2020
Voltage Divider for Self-Limited Analog State Programing of Memristors.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

Shortest Path Computing in Directed Graphs with Weighted Edges Mapped on Random Networks of Memristors.
Parallel Process. Lett., 2020

ReRAM-based Ratioed Combinational Circuit Design: a Solution for in-Memory Computing.
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020

Performance Assessment of Memristor Networks as Shortest Path Problem Solvers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Voltage-Driven Window Function Concept for Behavioral Memristor Device Modeling.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

On the Development of MCU-based ad hoc HW Interface Circuitry for Memristor Characterization.
Proceedings of the European Conference on Circuit Theory and Design, 2020

2019
Exploring Memristor Multi-Level Tuning Dependencies on the Applied Pulse Properties via a Low Cost Instrumentation Setup.
IEEE Access, 2019

Stuck-at-OFF Fault Analysis in Memristor-Based Architecture for Synchronization.
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

Modeling Memristor-Based Circuit Networks on Crossbar Architectures.
Proceedings of the Handbook of Memristor Networks., 2019

Mimicking Physarum Space Exploration with Networks of Memristive Oscillators.
Proceedings of the Handbook of Memristor Networks., 2019

2018
Experimental Study of Artificial Neural Networks Using a Digital Memristor Simulator.
IEEE Trans. Neural Networks Learn. Syst., 2018

Massively Parallel Analog Computing: Ariadne's Thread Was Made of Memristors.
IEEE Trans. Emerg. Top. Comput., 2018

Meet the editors.
Int. J. Parallel Emergent Distributed Syst., 2018

Special issue on 'Advances in Memristive Networks'.
Int. J. Parallel Emergent Distributed Syst., 2018

Variability-Tolerant Memristor-based Ratioed Logic in Crossbar Array.
Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, 2018

Experimental measurements on resistive switching devices: Gaining hands-on experience.
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018

Coupled Physarum-Inspired Memristor Oscillators for Neuron-like Operations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Memristive Cellular Automata for Modeling of Epileptic Brain Activity.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Resistive Switching Behavior seen from the Energy Point of View.
Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018

2017
Oscillation-Based Slime Mould Electronic Circuit Model for Maze-Solving Computations.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Memristor Crossbar for Adaptive Synchronization.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

1-D memristor-based cellular automaton for pseudo-random number generation.
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017

Towards memristive crossbar-based neuromorphic HW accelerators for signal processing.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

Exploring the voltage divider approach for accurate memristor state tuning.
Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017

An on-line test strategy and analysis for a 1T1R crossbar memory.
Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

2016
Alternative Architectures Toward Reliable Memristive Crossbar Memories.
IEEE Trans. Very Large Scale Integr. Syst., 2016

2T1M-Based Double Memristive Crossbar Architecture for In-Memory Computing.
Int. J. Unconv. Comput., 2016

Experience on material implication computing with an electromechanical memristor emulator.
Proceedings of the 2016 IEEE Symposium Series on Computational Intelligence, 2016

A Digital Memristor Emulator for FPGA-Based Artificial Neural Networks.
Proceedings of the 1st IEEE International Verification and Security Workshop, 2016

2015
SPICE modeling of nonlinear memristive behavior.
Int. J. Circuit Theory Appl., 2015

Live demonstration: XbarSim: An educational simulation tool for memristive crossbar-based circuits.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

XbarSim: An educational simulation tool for memristive crossbar-based circuits.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

LC filters with enhanced memristive damping.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
Design and development of nanoelectronic circuits and architectures
PhD thesis, 2014

Boolean Logic Operations and Computing Circuits Based on Memristors.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

On the generalization of composite memristive network structures for computational analog/digital circuits and systems.
Microelectron. J., 2014

Memristor-based combinational circuits: A design methodology for encoders/decoders.
Microelectron. J., 2014

Solving AI problems with memristors: A case study for optimal "bin packing".
Proceedings of the 18th Panhellenic Conference on Informatics, 2014

Shortest Path Computing Using Memristor-Based Circuits and Cellular Automata.
Proceedings of the Cellular Automata, 2014

2013
Improved read voltage margins with alternative topologies for memristor-based crossbar memories.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

On the analog computational characteristics of memristive networks.
Proceedings of the 20th IEEE International Conference on Electronics, 2013

2012
FPGA based cellular automata for environmental modeling.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Spreading Patterns of Mobile Phone Viruses Using Cellular Automata.
Proceedings of the Cellular Automata, 2012

2009
Node resource management for DSP applications on 3D Network-on-Chip architecture.
Proceedings of the 16th International Conference on Digital Signal Processing, 2009


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